Future automotive architectures are expected to transition from a network-centric to a domain-centered architecture featuring central compute units. Powerful domain controllers or smart sensors alleviate the load on these central units and communication systems. These controllers execute tasks with varying criticalities on heterogeneous multicore processors, and are ideally capable of dynamically balancing the computing load between the central unit and sensors. Here, Artificial Intelligence (AI) capabilities playa crucial role, as it is in high demand for such an automotive architecture. However, AI still requires specialized accelerators to improve their computation performance. Task-oriented distributed computing with criticalities up to ASIL-D necessitates the development and utilization of specialized methodologies, such as safety, through the isolation and abstraction of low-level hardware concepts. Meanwhile, online monitoring and diagnostics become vital features to detect errors during operation. The EMDRIVE architecture includes methods, components, and strategies to enhance the performance, safety, and security of such distributed computing platforms. The nationally funded EMDRIVE project connects its twelve partners from academia and industry and is currently in its intermediate stage.

The seamless and secure integration of subsystems is a pivotal requirement within contemporary automotive development, necessitating the application of design methodologies like the Vee model. While this approach includes dedicated verification steps for the included contexts and provides a high level of assurance that the system will operate correctly under specified conditions, formalizing specifications outside its operational design domain is per definition not included. Additionally, black-box systems like machine learning based functions prove difficulty to test by these traditional methodologies. In this project, we introduce and demonstrate a design workflow combining the Vee model design paradigm with continuous data-driven software engineering. Our workflow assists the continuous, safe and secure development and improvement of consumer vehicle functionality over the product lifecycle. This is achieved through the continuous monitoring of anomalies, as well as system states that deviate from the established design domain. The UNCOVER methodology consists of a continuous reduction in the amount of necessary monitored messages and presents a methodology throughout the entirety of the product lifecycle. We demonstrate our methodology through a simulation and show our automatic generation of monitoring components, and an automated preselection of identified safety or security incidents.

An ongoing trend in the domain of embedded computing systems is the consolidation of functionality on few, high-performance platforms. This development also impacts real-time systems, where a shift to parallel architectures enables meeting the increased throughput demands. On these multicore platforms, memory contention is a central concern regarding time-predictability. Additionally, isolation between tasks is required to limit the impact of faults during run time. We propose a scratchpad memory-based approach to predictable execution that integrates runtime-based isolation mechanisms with an LET-based task model. In order to mitigate interference between cores, each core executes from a local memory, while the data transfers between the local memories and the shared main memory are incorporated into a global, static schedule. Our task execution model is based on the Logical Execution Time (LET) paradigm, which we extend to include explicitly scheduled data transfers similar to the Predictable Execution Model (PREM). The implementation and evaluation of our approach is ongoing and will be evaluated on a custom RISe- 'v, based multicore platform. This novel approach allows for consolidating hard real-time tasks with high demands for functional safety onto a single platform.

Neural networks are increasingly used in real-time systems, such as automated driving applications. This requires high-performance hardware with predictable timing behavior. State-of-the-art real-time hardware is limited in memory and compute resources. On the other hand, modern accelerator systems lack the necessary predictability properties, mainly due to interference in the memory subsystem.We present a new hardware architecture with an accompanying compiler-based deployment toolchain to close this gap between performance and predictability. The hardware architecture consists of a multicore vector processor with predictable cores, each with local scratchpad memories. A central management core facilitates access to shared external memory through a static schedule calculated at compile-time. The presented compiler exploits the fixed data flow of neural networks and WCET estimates of subtasks running on individual cores to compute this schedule.Through this approach, the WCET estimate of the overall system can be obtained from the subtask WCET estimates, data transfer times, and access times of the shared memory in conjunction with the schedule calculated by the compiler.

Autonomous and distributed Industrial Internet of Things (IIoT) systems are increasingly developed and deployed. They have an enormous demand for resilience and availability. At the same time, they are in a constantly changing system environment. The underlying edge computing infrastructure is characterized by ever increasing processing power and connectivity as well as a high degree of decentralization. To reduce downtime and long redesign loops, self-adaptation capabilities are needed. Automatic reallocation of the executed tasks to the compute nodes is a possible self-adaptation measure. However, the reallocation should be compliant with the different demands, constraints and specifications of the design. At the same time, a major challenge is that the allocation decision should be fast enough to be calculated at runtime. This paper therefore proposes an allocation method that uses demands in the form of policies to compute automatic reallocation at runtime. The integration of the allocation method into runtime is enabled by combining constraint programming, step-wise multi-criteria solution approaches, and resource management at multiple levels. The policy-based allocation method is tested and evaluated in the context of a smart factory site for the function offloading of automated guided vehicles (AGVs) and driverless micromobiles. Our results show that the allocation method is capable of recalculating the allocation during runtime in milliseconds while maintaining design conformity. This enables the system to react to changes in the environment, thereby reducing the downtime of decentralized Industrial Internet of Things systems and increasing availability.