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Weihan Kong

dblp:345/4892 · DBLP profile ↗
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5ranked-venue papers
1as first author
5since 2021 · last 2026
0009-0007-6922-1740ORCID · corroborated

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 3 · 1 first-author · 3 since 2021Security and privacy · 1 · 1 since 2021Databases, data management, data science and information retrieval · 1 · 1 since 2021

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
3 papers
Memory systems · 75% Parallel and multicore computing · 14% Storage systems · 12%
Databases, data mining, and information retrieval
1 paper
Graph data management · 100%
Network and information security
1 paper
Security and privacy of machine learning · 100%

Topics — the 14 heaviest of 14, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Memory systems
processing-in-memory
1.622025
PimBeam: Efficient Regular Path Queries Over Graph Database Using Processing-in-Memory · IEEE Trans. Parallel Distributed Syst. 2025
RADAR: A Skew-Resistant and Hotness-Aware Ordered Index Design for Processing-in-Memory Systems · IEEE Trans. Parallel Distributed Syst. 2024
Graph data management › path query
regular path query
0.912025
PimBeam: Efficient Regular Path Queries Over Graph Database Using Processing-in-Memory · IEEE Trans. Parallel Distributed Syst. 2025
Parallel and multicore computing
graph processing
0.912025
PimBeam: Efficient Regular Path Queries Over Graph Database Using Processing-in-Memory · IEEE Trans. Parallel Distributed Syst. 2025
Memory systems
hybrid memory
0.912025
Phoenix: A Dynamically Reconfigurable Hybrid Memory System Combining Caching and Migration · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2025
Memory systems
memory management
0.912025
Phoenix: A Dynamically Reconfigurable Hybrid Memory System Combining Caching and Migration · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2025
Security and privacy of machine learning › adversarial attack
backdoor attack
0.812024
KerbNet: A QoE-Aware Kernel-Based Backdoor Attack Framework · IEEE Trans. Dependable Secur. Comput. 2024
Storage systems
indexing and storage engines
0.812024
RADAR: A Skew-Resistant and Hotness-Aware Ordered Index Design for Processing-in-Memory Systems · IEEE Trans. Parallel Distributed Syst. 2024
Memory systems › processing-in-memory
PIM index
0.812024
RADAR: A Skew-Resistant and Hotness-Aware Ordered Index Design for Processing-in-Memory Systems · IEEE Trans. Parallel Distributed Syst. 2024
Graph data management
dynamic graph
0.312025
PimBeam: Efficient Regular Path Queries Over Graph Database Using Processing-in-Memory · IEEE Trans. Parallel Distributed Syst. 2025
Graph data management
graph partitioning
0.312025
PimBeam: Efficient Regular Path Queries Over Graph Database Using Processing-in-Memory · IEEE Trans. Parallel Distributed Syst. 2025
Memory systems
non-volatile memory
0.312025
Phoenix: A Dynamically Reconfigurable Hybrid Memory System Combining Caching and Migration · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2025
Machine learning › Trustworthy machine learning
robustness
0.212024
KerbNet: A QoE-Aware Kernel-Based Backdoor Attack Framework · IEEE Trans. Dependable Secur. Comput. 2024
Memory systems
DRAM
0.212024
RADAR: A Skew-Resistant and Hotness-Aware Ordered Index Design for Processing-in-Memory Systems · IEEE Trans. Parallel Distributed Syst. 2024
Memory systems
memory wall
0.212024
RADAR: A Skew-Resistant and Hotness-Aware Ordered Index Design for Processing-in-Memory Systems · IEEE Trans. Parallel Distributed Syst. 2024

Methods — techniques the papers use, named apart from their topics

label filtering · 1.7dynamic graph partitioning · 1.7kernel operation · 1.5convolutional neural network · 1.5runtime reconfiguration · 0.9data migration · 0.9skip list · 0.8offline learning-based model · 0.8
YearPublicationVenuePosition
2026 Kirin: Efficient In-Storage Learned Compaction for LSM-Trees via System-Algorithm Co-Design
Shengan Zheng, Penghao Sun, Jin Pu, Kaijiang Deng, Bowen Zhang 0012, Weihan Kong, Yifan Hua, Linpeng Huang
Proc. VLDB Endow.7
2025 Phoenix: A Dynamically Reconfigurable Hybrid Memory System Combining Caching and Migration
abstract
With the growing memory requirements of modern data-intensive applications for high performance and large capacity, building hybrid memory systems with different memory technologies has become a dominant trend to satisfy these demands. For better system performance, frequently accessed hot data is fetched into the fast and capacity-limited near memory (NM) while cold data is evicted to the slow and large far memory (FM). In prior works, NM is used as a cache of FM (cNM), part of OS-visible memory (mNM), and a fixed capacity of cNM and mNM. This article presents Phoenix, a novel hybrid memory architecture that harnesses the advantages of both cNM and mNM. The ratio of cNM to mNM is adjustable during runtime to better exploit both temporal and spatial locality benefits for different memory access patterns. All cNM and mNM space is multiplexed to mitigate the data movement overhead for the mode switch between cNM and mNM. In our evaluations, Phoenix outperforms state-of-the-art designs by an average of 18.2% and consumes orders of magnitude less metadata storage space.
Yifan Hua, Shengan Zheng, Weihan Kong, Linpeng Huang
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.3
2025 PimBeam: Efficient Regular Path Queries Over Graph Database Using Processing-in-Memory
abstract
Regular path queries (RPQs) in graph databases are bottlenecked by the memory wall. Emerging processing-in-memory (PIM) technologies offer a promising solution to dispatch and execute path matching tasks in parallel within PIM modules. We present an efficient PIM-based data management system tailored for RPQs and graph updates. Our solution, called PimBeam, facilitates efficient batch RPQs and graph updates by implementing a PIM-friendly dynamic graph partitioning algorithm. This algorithm effectively addresses graph skewness issues while maintaining graph locality with low overhead for handling RPQs. PimBeam streamlines label filtering queries by adding a filtering module on the PIM side and leveraging the parallelism of PIM. For the graph updates, PimBeam enhances processing efficiency by amortizing the host CPU's update overhead to PIM modules. Evaluation results of PimBeam indicate 3.59x speedup for RPQs and 29.33x speedup for graph update on average over the state-of-the-art traditional graph database.
Weihan Kong, Shengan Zheng, Yifan Hua, Ruoyan Ma, Yuheng Wen, Linpeng Huang
IEEE Trans. Parallel Distributed Syst.1
2024 KerbNet: A QoE-Aware Kernel-Based Backdoor Attack Framework
abstract
Deep neural networks are vulnerable to backdoor attacks, where a specially-designed trigger will lead to misclassification of any benign samples. However, existing backdoor attacks usually impose conspicuous patch triggers on images, which are easily detected by humans and defense algorithms. Existing works on invisible triggers, however, either have reduced attack success rate or yield detectable patterns to visual inspections. In this paper, we proposeKerbNet, a kernel-based backdoor attack framework, which applies kernel operations to clean samples as the trigger to incur misclassification. The kernel-processed samples achieve a high attack success rate while appearing natural with high Quality-of-Experience (QoE). We carefully design the kernel trigger generation algorithm by exploiting the neural network structure to propagate the influence of the trigger to the target misclassification label under the QoE constraint. We conduct extensive experiments on five datasets, i.e., MNIST, GTSRB, CIFAR-10, CelebA, and ImageNette to evaluate the effectiveness and practicality ofKerbNetunder the impact of various factors, including neuron-residing layer, kernel size, base image, loss function, model structure, and so on. We also show that our proposed attacks can evade state-of-the-art defense strategies and visual inspections. Code will be available after publication.
Xueluan Gong, Yanjiao Chen, Huayang Huang, Weihan Kong, Chao Shen 0001, Qian Wang 0002
IEEE Trans. Dependable Secur. Comput.4
2024 RADAR: A Skew-Resistant and Hotness-Aware Ordered Index Design for Processing-in-Memory Systems
abstract
Pointer chasing becomes the performance bottleneck for today's in-memory indexes due to the memory wall. Emerging processing-in-memory (PIM) technologies are promising to mitigate this bottleneck, by enabling low-latency memory access and aggregated memory bandwidth scaling with the number of PIM modules. Prior PIM-based indexes adopt a fixed granularity to partition the key space and maintain static heights of skiplist nodes among PIM modules to accelerate index operations on skiplist, neglecting the changes in skewness and hotness of data access patterns during runtime. In this article, we present RADAR, an innovative PIM-friendly skiplist that dynamically partitions the key space among PIM modules to adapt to varying skewness. An offline learning-based model is employed to catch hotness changes to adjust the heights of skiplist nodes. In multiple datasets, RADAR achieves up to 198.2x performance improvement and consumes 47.4% less memory than state-of-the-art designs on real PIM hardware.
Yifan Hua, Shengan Zheng, Weihan Kong, Kaixin Huang, Ruoyan Ma, Linpeng Huang
IEEE Trans. Parallel Distributed Syst.3