Demo Data from VLDB 2026 / reviewers in the wild / expert
Zitong An
dblp:347/3299
· DBLP profile ↗
3ranked-venue papers
1as first author
3since 2021 · last 2026
0009-0002-2817-0573ORCID · corroborated
Domains — the database's venue-derived domains; a paper can count in several
Systems, architecture and hardware · 2 · 1 first-author · 2 since 2021Artificial intelligence and machine learning · 1 · 1 since 2021
Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.
| Computer architecture, parallel and distributed computing, and storage systems
1 paper |
Parallel and multicore computing · 38% Performance modeling and evaluation · 38% Hardware accelerators and domain-specific architectures · 12% | |
| Artificial intelligence
1 paper |
Graph learning · 100% |
Topics — the 4 heaviest of 5, each with the papers that count most for it
| Topic | Weight | Papers | Last | Evidence papers |
|---|---|---|---|---|
Performance modeling and evaluation
bottleneck analysis |
1.0 | 1 | 2026 | Quantitative Analysis and Performance Optimization of Graph Neural Networks on Multi-core CPUs · ACM Trans. Archit. Code Optim. 2026 |
Machine learning › Graph learning
graph neural network |
0.3 | 1 | 2026 | Quantitative Analysis and Performance Optimization of Graph Neural Networks on Multi-core CPUs · ACM Trans. Archit. Code Optim. 2026 |
Hardware accelerators and domain-specific architectures
sparse computation |
0.3 | 1 | 2026 | Quantitative Analysis and Performance Optimization of Graph Neural Networks on Multi-core CPUs · ACM Trans. Archit. Code Optim. 2026 |
GPUs and heterogeneous computing › GPU kernel
sparse-dense matrix multiplication |
0.3 | 1 | 2026 | Quantitative Analysis and Performance Optimization of Graph Neural Networks on Multi-core CPUs · ACM Trans. Archit. Code Optim. 2026 |
Methods — techniques the papers use, named apart from their topics
register padding and tiling · 2.0index reorganization · 2.0bias fusion GEMM · 2.0
| Year | Publication | Venue | Position |
|---|---|---|---|
| 2026 | AMXStencil: Boosting the Performance of Stencil Computations on AMX-Powered CPUs via Fusion
Zitong An, Kangkang Chen, Huayou Su, Jinwei Xu, Xi Yang 0020 |
APPT | 1 |
| 2026 | Quantitative Analysis and Performance Optimization of Graph Neural Networks on Multi-core CPUsabstractGraph Neural Networks (GNNs) are becoming increasingly popular in graph data processing due to their excellent performance in feature extraction on graph datasets. Compared to GPUs, CPUs are more widely accessible and serve as a practical platform for GNN inference. However, achieving efficient GNN execution on CPUs remains a challenge. We first comprehensively evaluate and quantitatively analyze the performance of GNN inference on multi-core CPUs using the state-of-the-art frameworks, identifying four key performance bottlenecks: inefficient sparse computation, poor data locality, workload imbalance, and inefficient General Matrix Multiplication (GEMM). To tackle these issues, we introduce a set of joint optimizations. Specifically, for the aggregation phase, we propose three optimizations: a register padding and tiling Graph Sparse-dense Matrix Multiplication (GSpMM) algorithm that leverages the computation capability of long vector processing units on modern multi-core CPUs, a destination node-oriented indexes reorganization to enhance data locality, and a boundary buffer-based method to balance the workloads. Additionally, for the update phase, we develop an efficient bias fusion GEMM algorithm, tailored for the irregular matrices. We evaluate the proposed optimizations extensively with three popular GNN models on three typical multi-core CPU platforms. Experimental results on Intel, AMD, and ARM platforms show that our optimizations outperform the state-of-the-art GNN framework DGL by an average factor of 2.41×, 1.58×, and 2.04× (up to 4.75×, 2.70×, and 3.55×), respectively. Compared to PyG, our implementations achieve an average speedup of 1.70×, 1.86×, and 2.44×, respectively. Kangkang Chen, Huayou Su, Xi Yang 0020, Zitong An, Yong Dou, Dongsheng Li 0001 |
ACM Trans. Archit. Code Optim. | 4 |
| 2024 | Separating Spectral and Spatial Feature Aggregation for DemosaickingabstractExisting demosaicking neural models typically follow the same design principles as those adopted by the rest image restoration tasks; yet one unique & often overlooked problem with demosaicking is it also suffers from the moiré artifact. This observation inspires us to examine the key reason that moiré happens only to demosaicking instead of other image restoration tasks. In this process, We identify the spectral inconsistency concealed in the input of demosaicking neural networks; our findings also clarify the failure of the traditional dense spatiospectral feature aggregation in mitigating spectral inconsistency. Based on the analysis, a new solution is proposed to address moiré while preserving fine image details. In particular, we decouple the traditionally used spatio-spectral feature aggregation into comprehensive spectral aggregation and local spatial aggregation. Throughout a diverse range of experiments with quantitative and qualitative results, our approach is shown capable of significantly reducing artifacts such as moiré and over-smoothness, as well as drastically boosting state-of-the-art performance without increasing computational cost. Xuanchen Li, Yan Niu, Zitong An |
IJCNN | 6 |