VLDB 2026 Research / reviewers in the wild / expert
Fabian Buschkowski
dblp:348/7653
· DBLP profile ↗
3ranked-venue papers
2as first author
3since 2021 · last 2026
0000-0003-2165-3564ORCID · corroborated
Domains — the database's venue-derived domains; a paper can count in several
Systems, architecture and hardware · 2 · 1 first-author · 2 since 2021Software engineering, systems software and programming languages · 2 · 1 first-author · 2 since 2021Security and privacy · 1 · 1 first-author · 1 since 2021
| Year | Publication | Venue | Position |
|---|---|---|---|
| 2026 | PaCMan - Partition-Code Masking for Combined Security
Fabian Buschkowski, Jakob Feldtkeller, Tim Güneysu, Elisabeth Krahmer, Jan Richter-Brockmann, Pascal Sasdrich |
EUROCRYPT (7) | 1 |
| 2024 | Evaluating an Open-Source Hardware Approach from HDL to GDS for a Security Chip Design - a Review of the Final Stage of Project HEPabstractThe project “Hardening the value chain through open-source, trustworthy EDA tools and processors (HEP)” uses open-source, free components and tools for the production of a prototypical security chip. A design flow using only free and open tools from the abstract description in SpinalHDL via OpenROAD down to the GDS-file for tape-out has been established, and first ASICs produced at IHP. The prototypical hardware security module (HSM) produced in this way provides, among other things, a processor based on VexRiscv, a cryptographic accelerator and masking of cryptographic keys. The open development tools used in the process were integrated into a common environment and expanded to include missing functionality. Subsequently, the whole tool chain and its peripherals are wrapped into a new Nyx container. The easy accessibility of the used process significantly reduces the learning curve for chip design. Additionally, we provide tools for formal verification and masking against side-channel attacks in our design flow. Interest in the results of project HEP has been shown in publications in which industrial partners participated, such as Elektrobit, Hensoldt Cyber, IAV, Secure-IC and Swissbit Germany. Tim Henkes, Steffen Reith, Marc Stöttinger, Norbert Herfurth, Goran Panic, Julian Wälde, Fabian Buschkowski, Pascal Sasdrich, Christoph Lüth, Milan Funck, Tuba Kiyan, Arnd Weber, Detlef Boeck, René Rathfelder, Torsten Grawunder |
DATE | 7 |
| 2023 | EasiMask-Towards Efficient, Automated, and Secure Implementation of Masking in HardwareabstractSide-Channel Analysis (SCA) is a major threat to implementations of mathematically secure cryptographic algorithms. Applying masking countermeasures to hardware-based implementations is both time-consuming and error-prone due to side-effects buried deeply in the hardware design process. As a consequence, we propose our novel framework Easi-Mask in this work. Our semi-automated framework enables designers that have little experience with hardware implementation or physical security and the application of countermeasures to create a securely masked hardware implementation from an abstract description of a cryptographic algorithm. Its design-flow dismisses the developer from many challenges in the masking process of hardware implementations, while the generated implementations match the efficiency of hand-optimized designs from experienced security engineers. The modular approach can be mapped to arbitrary instantiations using different languages and transformations. We have verified the functionality, security, and efficiency of generated designs for several state of the art symmetric cryptographic algorithms, such as Advanced Encryption Standard (AES), Keccak, and PRESENT. Fabian Buschkowski, Pascal Sasdrich, Tim Güneysu |
DATE | 1 |