We describe in this paper a novel approach based upon machine learning for estimating layout shape functions of full-custom integrated circuit cells. A neural network is trained to estimate one dimension of cell layout from circuit netlist, a desired packing density, and prescribed values of the complementary dimension. The neural network is then combined with a linear function generator and a neural network that predicts the number of contacts (vias) to produce estimates of cell layout shape functions. We have experimented with this approach on an independent test set of circuits and the results are very encouraging. The resulting estimation system is very fast and can be easily incorporated into exiting floorplanning systems. An additional benefit of the the machine learning aspect is the simplicity and systematicity in incorporating into the estimation system new circuits and technology information as they become available.

The estimation of the height and width of a custom cell layout (CCL) from schematics is an important task in integrated circuit computer aided design and can be of direct assistance to designers. In this paper, we describe and report results on two CCL dimension estimation techniques. In the first, a neural network is trained to predict the width (or height) of a cell given its schematics and its height (or width). The results show that knowledge of one dimension significantly improves the prediction accuracy of the other. In the second, we explore improvements to previous work (see IEEE Trans. on Neural Networks, vol. 3, no. 1, p. 146-153, 1992) on simultaneous CCL dimension prediction by replacing the neural network that estimates the width and height simultaneously by cascaded neural networks.