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Ruisi Shen

dblp:354/1933 · DBLP profile ↗
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2ranked-venue papers
0as first author
2since 2021 · last 2026
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Artificial intelligence and machine learning · 1 · 1 since 2021Systems, architecture and hardware · 1 · 1 since 2021

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
1 paper
Memory systems · 77% Performance modeling and evaluation · 23%
Computer networks
1 paper
Physical-layer communications · 100%

Topics — the 3 heaviest of 4, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Memory systems › in-memory computing
ReRAM-based accelerator
0.912025
MemMIMO: A Simulation Framework for Memristor-Based Massive MIMO Acceleration · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2025
Physical-layer communications › MIMO › massive MIMO
massive MIMO precoding
0.312025
MemMIMO: A Simulation Framework for Memristor-Based Massive MIMO Acceleration · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2025
Physical-layer communications
MIMO
0.312025
MemMIMO: A Simulation Framework for Memristor-Based Massive MIMO Acceleration · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2025

Methods — techniques the papers use, named apart from their topics

mapping · 1.7device fitting · 1.7behavioral modeling · 1.7
YearPublicationVenuePosition
2026 SIMBRAIN: A nonidealities-aware simulation framework for spiking neural networks based on memristor crossbars
Jiawei Xu 0002, Ruisi Shen, Dimitrios Stathis 0001, Lirong Zheng 0001, Zhuo Zou, Ahmed Hemani
Neurocomputing3
2025 MemMIMO: A Simulation Framework for Memristor-Based Massive MIMO Acceleration
abstract
Memristor-based crossbar architectures have proven highly effective for matrix vector multiplication (MVM) operations, making them a promising solution for accelerating the MVMs widely used in precoding algorithms for multiple input multiple output (MIMO) wireless communication systems. However, real-world implementation of memristor-based computing systems face challenges due to commonly observed non-idealities in both the devices themselves and the circuits they’re built into. To facilitate a rapid design flow and investigate the impact of non-idealities, an integrated open-source simulation framework MemMIMO is developed. The simulation framework estimates the accuracy and hardware performance of the computing system, offering a variety of flexible design options. MemMIMO integrates a behavioral model of the mix-signal architecture with a digital front-end. There are three major building blocks in MemMIMO: the device fitting block, the mapping block, and the performance estimation block. These blocks work together to map the complex MVMs in precoding algorithms for MIMO systems to crossbar-based architectures that incorporate memristor models characterized by physical device behavior. Using two typical use cases targeting six-generation (6G) massive MIMO communication as case studies, MemMIMO is used to model different memristor devices, explore the impact of non-idealities on system accuracy, and benchmark circuit-level performance metrics including area, speed, and power.
Jiawei Xu 0002, Dimitrios Stathis 0001, Ruisi Shen, Lirong Zheng 0001, Zhuo Zou, Ahmed Hemani
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.5