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Sean Triechle

dblp:36/10441 · DBLP profile ↗
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1ranked-venue papers
0as first author
0since 2021 · last 2011
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 1

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
1 paper
GPUs and heterogeneous computing · 44% High-performance computing · 44% Performance modeling and evaluation · 13%

Topics — the 2 heaviest of 3, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
High-performance computing › numerical linear algebra
dense matrix multiplication
0.112011
Fast implementation of DGEMM on Fermi GPU · SC 2011
GPUs and heterogeneous computing
GPU computing
0.112011
Fast implementation of DGEMM on Fermi GPU · SC 2011

Methods — techniques the papers use, named apart from their topics

vector memory operations · 0.1software pipelining · 0.1instruction scheduling · 0.1
YearPublicationVenuePosition
2011 Fast implementation of DGEMM on Fermi GPU
abstract
In this paper we present a thorough experience on tuning double-precision matrix-matrix multiplication (DGEM-M) on the Fermi GPU architecture. We choose an optimal algorithm with blocking in both shared memory and registers to satisfy the constraints of the Fermi memory hierarchy. Our optimization strategy is further guided by a performance modeling based on micro-architecture benchmarks. Our optimizations include software pipelining, use of vector memory operations, and instruction scheduling. Our best CUDA algorithm achieves comparable performance with the latest CUBLAS library. We further improve upon this with an implementation in the native machine language, leading to 20% increase in performance. That is, the achieved peak performance (efficiency) is improved from 302Gflop/s (58%) to 362Gflop/s (70%).
Guangming Tan, Linchuan Li, Sean Triechle, Everett H. Phillips, Yungang Bao, Ninghui Sun
SC3