Tianlei Xiong

dblp:366/3587 · DBLP profile ↗
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2ranked-venue papers
0as first author
2since 2021 · last 2026
0009-0004-1035-5435ORCID · corroborated

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 1 · 1 since 2021Software engineering, systems software and programming languages · 1 · 1 since 2021

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
1 paper
Memory systems · 54% Cloud and datacenter computing · 46%

Topics — the 7 heaviest of 7, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Memory systems
cache
1.012026
SpiderSense: Lightweight Last-Level Cache Management via Time Period Tagging for LLC-Critical Workloads · ACM Trans. Archit. Code Optim. 2026
Memory systems › cache management
cache partitioning
1.012026
SpiderSense: Lightweight Last-Level Cache Management via Time Period Tagging for LLC-Critical Workloads · ACM Trans. Archit. Code Optim. 2026
Memory systems › memory hierarchy › cache hierarchy
last-level cache
1.012026
SpiderSense: Lightweight Last-Level Cache Management via Time Period Tagging for LLC-Critical Workloads · ACM Trans. Archit. Code Optim. 2026
Cloud and datacenter computing › multi-tenancy
multi-tenant cloud
1.012026
SpiderSense: Lightweight Last-Level Cache Management via Time Period Tagging for LLC-Critical Workloads · ACM Trans. Archit. Code Optim. 2026
Cloud and datacenter computing
performance isolation
1.012026
SpiderSense: Lightweight Last-Level Cache Management via Time Period Tagging for LLC-Critical Workloads · ACM Trans. Archit. Code Optim. 2026
Cloud and datacenter computing
virtualization
0.312026
SpiderSense: Lightweight Last-Level Cache Management via Time Period Tagging for LLC-Critical Workloads · ACM Trans. Archit. Code Optim. 2026
Cloud and datacenter computing › virtualization
virtual machine monitor
0.312026
SpiderSense: Lightweight Last-Level Cache Management via Time Period Tagging for LLC-Critical Workloads · ACM Trans. Archit. Code Optim. 2026

Methods — techniques the papers use, named apart from their topics

time period tagging · 1.0dynamic sampling · 1.0
YearPublicationVenuePosition
2026 SpiderSense: Lightweight Last-Level Cache Management via Time Period Tagging for LLC-Critical Workloads
abstract
Multi-tenant clouds enhance resource sharing among Virtual Machines (VMs) to boost overall utilization and reduce power consumption. However, this also introduces interference among workloads from different tenants and impedes VM performance isolation. In this article, we first demonstrate that the last-level cache (LLC) in CPUs, which is inherently shared by all VMs on the same physical machine, becomes a significant contending resource for LLC-critical workloads, leading to notable performance imbalances under the default hardware caching strategy. Although recent studies on LLC scheduling have progressed, they often require detailed profiling of user workloads or rely on hyperparameter tuning, limiting their applicability to private clusters or specific scenarios. We propose SpiderSense, a software-initiated LLC partitioner for managing Virtual Machine Monitors (VMM), to address these limitations. SpiderSense leverages modern yet off-the-shelf server CPU features to adaptively orchestrate LLC allocation among running black-boxed user VMs. SpiderSense dynamically samples VMs and calculates their fair share of LLC to allocate them while fully improving performance isolation among VMs. We experiment with SpiderSense using typical LLC-critical workloads, representative of the types of applications that stress LLC performance, such as Memcached and Llama. Our results show that SpiderSense improves performance by up to 40% in numerous colocation scenarios compared to current solutions.
Zhixiang Wei, Zhibai Huang, James Yen, Tianlei Xiong, Kailiang Xu, Yucheng Zheng, Xingzi Yu, Yun Wang 0039, Zhengwei Qi
ACM Trans. Archit. Code Optim.4
2024 Enhancing embedded systems development with TS-
Xingzi Yu, Tianlei Xiong, Wengang Chen, Zhengwei Qi
Autom. Softw. Eng.3