Demonstration venue · read-only. Every page can be browsed; the buttons that would change it are switched off. Create an account to run TaxoReview on your own data. A simulation from public publication records: the people listed were not invited and did not agree to review.
? Tutorial for this page

Liangliang Tong

dblp:37/3306 · DBLP profile ↗
← Back
4ranked-venue papers
2as first author
0since 2021 · last 2013
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Software engineering, systems software and programming languages · 2 · 2 first-authorSystems, architecture and hardware · 1Human-computer interaction and ubiquitous computing · 1

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Software engineering, system software, and programming languages
1 paper
Compilers and program optimization · 100%
Computer architecture, parallel and distributed computing, and storage systems
1 paper
Embedded and real-time systems · 100%

Topics — the 2 heaviest of 2, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Compilers and program optimization
loop transformation
0.112008
Power-Aware Code Restructuring for Embedded Parallel Storing Device · PerCom 2008
Embedded and real-time systems
embedded storage
0.012008
Power-Aware Code Restructuring for Embedded Parallel Storing Device · PerCom 2008

Methods — techniques the papers use, named apart from their topics

static analysis · 0.2
YearPublicationVenuePosition
2013 Skew-space garbage collection
Liangliang Tong, Francis C. M. Lau 0001
Sci. Comput. Program.1
2010 Index-Compact Garbage Collection
Liangliang Tong, Francis C. M. Lau 0001
APLAS1
2009 L1 Collective Cache: Managing Shared Data for Chip Multiprocessors
Guanjun Jiang, Degui Feng, Liangliang Tong, Lingxiang Xiang, Chao Wang 0058, Tianzhou Chen
APPT3
2008 Power-Aware Code Restructuring for Embedded Parallel Storing Device
abstract
In order to cope with the energy challenge emerging with the process of parallelism in embedded storing device, this paper focuses on the static code restructuring of nested loop array accessing related to storing device. Departing the running time of different devices can extend the duration time when it is in low- power state. Experiment shows that power-aware code restructuring can effectively reduce state switching times and extra power wasted. Static method described in this paper can achieve up to 12% power reduction if it cooperates with proper dynamic method.
Bin Xie 0002, Qingsong Shi, Liangliang Tong, Jiangwei Huang, Xinliang Wu, Tianzhou Chen
PerCom3