Alfonso Sánchez-Macián

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20ranked-venue papers
5as first author
9since 2021 · last 2024
0000-0002-2220-0594ORCID · verified

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 10 · 4 first-author · 3 since 2021Computer networks · 4 · 2 since 2021Security and privacy · 4 · 4 since 2021Artificial intelligence and machine learning · 1 · 1 first-authorSoftware engineering, systems software and programming languages · 1Applied, interdisciplinary, general and emerging computing · 1
YearPublicationVenuePosition
2024 On the Privacy of Multi-Versioned Approximate Membership Check Filters
abstract
Approximate membership filters are increasingly used in many computing and networking applications and new filter designs are being continuously presented to improve one or more performance metrics. Therefore, understanding their security and privacy is an important issue. Previous works have considered attackers that only have access to an individual filter in isolation. For applications that generate many related filters, such as a filter for a deny list that evolves over time, that analysis is insufficient. This paper considers an attacker with access to several versions of a filter that share most of the same input elements. We find that for typical implementations of Bloom, cuckoo, and quotient filters, the attacker gains little or no advantage with access to multiple versions of a filter. However, typical xor filters do reveal more information about their input elements by querying multiple versions of a filter, and we propose techniques to enhance the privacy of xor filters and others.
Pedro Reviriego, Alfonso Sánchez-Macián, Peter C. Dillinger, Stefan Walzer
IEEE Trans. Dependable Secur. Comput.2
2023 Attacking the Privacy of Approximate Membership Check Filters by Positive Concentration
abstract
Approximate membership check filters are increasingly used to speed up data processing in many applications. Also, privacy is becoming a key design objective for many systems and thus, the privacy of filters needs to be carefully considered. Previous works have shown that an attacker that knows the implementation details of the filter and has access to its content, may be able to extract some information about the elements stored in the filter. This attack is, however, specific to Bloom filters and requires that the universe of elements must be small. In this article, we show that in many practical settings, an attacker that has only a black-box access to the filter, can extract information about the elements stored in the filter regardless of the specific filter type and the universe size. This is possible based on the key observation that in many applications, the elements stored in the filter are not randomly chosen, but they are concentrated in one or more parts of the universe of elements. To identify these parts, the positive probability can be measured on different parts of the universe; the parts having significantly larger values than the average positive probability for the filter are the ones on which the filter elements are concentrated. This approach is formalized and applied to several case studies showing the process by which the attacker can get additional information about the elements stored for the filters in a wide range of scenarios.
Pedro Reviriego, Alfonso Sánchez-Macián, Elena Merino Gómez, Ori Rottenstreich, Shanshan Liu 0001, Fabrizio Lombardi
IEEE Trans. Computers2
2023 On the Privacy of Counting Bloom Filters Under a Black-Box Attacker
abstract
Counting Bloom Filters (CBFs) areapproximatemembership checking data structures, and it is normally believed that at most anapproximatereconstruction of the underlying set can be derived when interacting with a CBF. This paper decisively refutes this assumption. In a recent paper, we considered the privacy of CBFs when the attacker has access to the implementation details and thus, it sees the filter as a white-box. In that setting, we showed that the attacker may be able to extract the elements stored in the filter when the number of false positives over the entire universe is not significantly larger than the number of elements stored in the filter. In this work, we consider a black-box attacker that can only perform user interactions on the CBF to insert, remove and query elements with no knowledge of the filter implementation details. We show that even in this case, an attacker may be able to extract information from the filter at the cost of using more complex and time-consuming attack algorithms. The proposed algorithms have been implemented and compared with the white-box attack, showing that in most cases, almost the same information can be extracted from the filter.
Sergio Galán, Pedro Reviriego, Stefan Walzer, Alfonso Sánchez-Macián, Shanshan Liu 0001, Fabrizio Lombardi
IEEE Trans. Dependable Secur. Comput.4
2023 On the Privacy of Counting Bloom Filters
abstract
Bloom filters are widely used in networking and computing to accelerate membership checking. In many applications filters store sensitive data, so their privacy is of primary concern. At first glance, it seems that extracting the set of elements inserted from the filter would not be possible, because in Bloom filters elements are mapped to positions using hash functions. However, previous works have shown that for the Bloom filter, it may be possible to identify few of the elements inserted in the filter. In this work, we consider the case of counting Bloom filters (CBFs) and show that in some cases, the entire set of elements used to create the filter can be extracted from the filter. This poses serious privacy and security concerns when an attacker can get access to the filter contents. In this article, an algorithm to extract the elements inserted from the filter is presented and analyzed theoretically; then, the feasibility of the CBF inversion is shown by simulation. A case study is presented in detail to illustrate that in practical applications, these conditions can be met by using additional restrictions that are implicit in the nature of the application itself.
Pedro Reviriego, Alfonso Sánchez-Macián, Stefan Walzer, Elena Merino Gómez, Shanshan Liu 0001, Fabrizio Lombardi
IEEE Trans. Dependable Secur. Comput.2
2022 On the Security of the K Minimum Values (KMV) Sketch
abstract
Data sketches are widely used to accelerate operations in big data analytics. For example, algorithms use sketches to compute the cardinality of a set, or the similarity between two sets. Sketches achieve significant reductions in computing time and storage requirements by providing probabilistic estimates rather than exact values. In many applications, an estimate is sufficient and thus, it is possible to trade accuracy for computational complexity; this enables the use of probabilistic sketches. However, the use of probabilistic data structures may create security issues because an attacker may manipulate the data in such a way that the sketches produce an incorrect estimate. For example, an attacker could potentially inflate the estimate of the number of distinct users to increase its revenues or popularity. Recent works have shown that an attacker can manipulate Hyperloglog, a sketch widely used for cardinality estimate, with no knowledge of its implementation details. This paper considers the security of K Minimum Values (KMV), a sketch that is also widely used to implement both cardinality and similarity estimates. Next sections characterize vulnerabilities at an implementation-independent level, with attacks formulated as part of a novel adversary model that manipulates the similarity estimate. Therefore, the paper pursues an analysis and simulation; the results suggest that as vulnerable to attacks, an increase or reduction of the estimate may occur. The execution of the attacks against the KMV implementation in the Apache DataSketches library validates these scenarios. Experiments show an excellent agreement between theory and experimental results.
Pedro Reviriego, Alfonso Sánchez-Macián, Shanshan Liu 0001, Fabrizio Lombardi
IEEE Trans. Dependable Secur. Comput.2
2022 Design and implementation of efficient QCA full-adders using fault-tolerant majority gates
Jefferson Andres Bravo-Montes, Alonso Martín-Toledano, Alfonso Sánchez-Macián, Oscar Ruano, Francisco Garcia-Herrero
J. Supercomput.3
2022 Attacking Adaptive Cuckoo Filters: Too Much Adaptation Can Kill You
abstract
Adaptation has recently been proposed to reduce the false positive rate of approximate membership check filters for applications in which the same elements are checked multiple times. Its operational principle is to adapt the filter when a false positive occurs for a given element, such that subsequent checks of that element do not cause a positive result (as beneficial for example in networking). Security is an important consideration for approximate membership check filters and several attacks have been described in the literature; therefore, it is of interest to study the security of adaptive filters. In this paper, we consider adaptive cuckoo filters and show that an attacker can generate sequences of lookups that cause the filter to continuously adapt and not being able to remove the false positives. This degrades the filter performance due to the adaptation overhead; it also makes it harder for other false positives to be removed, because adaptation can be monopolized by the attacker. This can be done when the attacker has only a black-box access to the filter being able to perform lookups but with no knowledge of the implementation of the filter. The proposed attacks have been implemented and tested to validate their effectiveness in terms of the construction of the attack set and the impact of the attack itself. The evaluation results confirm that adaptation unfortunately increases the attack surface of filters and new mechanisms to protect them should be developed.
Pedro Reviriego, Alfonso Sánchez-Macián, Salvatore Pontarelli, Shanshan Liu 0001, Fabrizio Lombardi
IEEE Trans. Netw. Serv. Manag.2
2022 Adaptive One Memory Access Bloom Filters
abstract
Bloom filters are widely used to perform fast approximate membership checking in networking applications. The main limitation of Bloom filters is that they suffer from false positives that can only be reduced by using more memory. We suggest to take advantage of a common repetition in the identity of queried elements to adapt Bloom filters for avoiding false positives for elements that repeat upon queries. In this paper, one memory access Bloom filters are used to design an adaptation scheme that can effectively remove false positives while completing all queries in a single memory access. The proposed filters are well suited for scenarios on which the number of memory bits per element is low and thus complement existing adaptive cuckoo filters that are not efficient in that case. The evaluation results using packet traces show that the proposed adaptive Bloom filters can significantly reduce the false positive rate in networking applications with the single memory access. In particular, when using as few as four bits per element, false positive rates below 5% are achieved.
Pedro Reviriego, Alfonso Sánchez-Macián, Ori Rottenstreich, David Larrabeiti
IEEE Trans. Netw. Serv. Manag.2
2021 Low delay non-binary error correction codes based on Orthogonal Latin Squares
Francisco Garcia-Herrero, Alfonso Sánchez-Macián, Juan Antonio Maestro
Integr.2
2020 An Algorithmic-Based Fault Detection Technique for the 1-D Discrete Cosine Transform
abstract
The discrete cosine transform (DCT) is a key building block for many applications in communications and signal processing. Likewise, it is also popular in space applications such as those that perform audio or image compression. The problem with space applications is that they usually have to work in a high radiation environment that affects electronic components and distorts their correct functionality. Therefore, it is usual to devise alternative implementation of the designs that can detect the presence of errors and discard the affected samples. In this brief, we explore the use of algorithmic-based fault tolerance (ABFT) techniques, which exploit certain algorithmic properties to detect errors. In particular, an ABFT technique for the Arai DCT is proposed and compared to standard protection schemes based on modular redundancy. Experimental results show that important savings in terms of resource overhead can be obtained with our approach while still maintaining the error detection rate at a reasonable level.
Luis Alberto Aranda, Alfonso Sánchez-Macián, Juan Antonio Maestro
IEEE Trans. Very Large Scale Integr. Syst.2
2019 Enhancing Instruction TLB Resilience to Soft Errors
abstract
A translation lookaside buffer (TLB) is a type of cache used to speed up the virtual to physical memory translation process. Instruction TLBs store virtual page numbers and their related physical page numbers for the last accessed pages of instruction memory. TLBs like other memories suffer soft errors that can corrupt their contents. A false positive due to an error produced in the virtual page number stored in the TLB may lead to a wrong translation and, consequently, the execution of a wrong instruction that can lead to a program hard fault or to data corruption. Parity or error correction codes have been proposed to provide protection for the TLB, but they require additional storage space. This paper presents some schemes to increase the instruction TLB resilience to this type of errors without requiring any extra storage space, by taking advantage of the spatial locality principle that takes place when executing a program.
Alfonso Sánchez-Macián, Luis Alberto Aranda, Pedro Reviriego, Vahdaneh Kiani, Juan Antonio Maestro
IEEE Trans. Computers1
2017 Combined Modular Key and Data Error Protection for Content-Addressable Memories
abstract
Content-addressable memories (CAMs) are a type of memory that receives an input search key and compares it to every entry of a table of stored keys. If there is a match, they return the corresponding address where the value was found. Alternatively, they can include a related Random Access Memory (RAM) that is accessed with the matching address, returning the corresponding data values. To protect a CAM with associated RAM against errors, parity or error-correction codes (ECCs) are typically used. They usually protect the CAM and the RAM information separately incurring in additional storage needs. This paper proposes a scheme to protect some configurations of CAM with its associated RAM from errors with a single ECC code. This ECC code can be used to provide advanced error correction to the combination of the key and data values stored in the CAM and the RAM, but it can also be applied in a modular way to provide simpler protection to the key or to the values individually.
Alfonso Sánchez-Macián, Pedro Reviriego, Juan Antonio Maestro
IEEE Trans. Computers1
2017 Single Event Transient Tolerant Bloom Filter Implementations
abstract
Bloom filters have been used to reduce the delay in networking and computing applications when a set membership check is to be applied. Error sources can affect the behavior of Bloom filters resulting in a wrong outcome of this membership test and a possible effect in the system's output. Single event transients are a type of temporary errors altering the operation of combinational logic. A single event transient affecting the hash generation logic of a hardware-implemented Bloom filter can produce errors such as false negatives. This paper presents different approaches to build Bloom filters that are tolerant to single event transients occurring in the hash generation circuitry. They are compared to the use of traditional Modular Redundancy approaches. The results show that the new schemes can reduce significantly the circuit area needed to implement the Bloom filter.
Alfonso Sánchez-Macián, Pedro Reviriego, Juan Antonio Maestro, Shanshan Liu 0001
IEEE Trans. Computers1
2017 A Scheme to Reduce the Number of Parity Check Bits in Orthogonal Latin Square Codes
abstract
The use of error-correcting codes is a common strategy to protect memories from errors. Single-error correction, double-error detection linear block codes have been traditionally utilized. However, there are applications where multiple errors are frequent and more complex codes are needed. Orthogonal Latin square codes are one type of codes with multiple-error-correction capability. They are of interest for memory protection because they can be decoded with low complexity and delay. This paper presents a modification to orthogonal Latin square codes that reduces the number of parity check bits to be stored in memory therefore lowering the memory overhead needed to implement the codes. The proposed codes can also be decoded with low delay and complexity. This paper also presents an evaluation of the encoder and decoder implementations for various word sizes and compares them with the standard orthogonal Latin square implementations. The results show that they are similar in terms of circuit area and introduce only a small penalty in delay.
Pedro Reviriego, Shanshan Liu 0001, Alfonso Sánchez-Macián, Liyi Xiao, Juan Antonio Maestro
IEEE Trans. Reliab.3
2016 Optimizing the Implementation of SEC-DAEC Codes in FPGAs
abstract
Single error correction and double-adjacent error correction (SEC-DAEC) codes are a type of error correction codes (ECCs) capable of correcting single and double-adjacent errors. They are useful in applications where multiple adjacent errors may occur, such as space or avionics. ECC encoders and decoders have a regular structure that makes it easier to accommodate them into field-programmable gate arrays (FPGAs). This brief proposes methods to optimize the decoder of SEC-DAEC codes when implemented in an FPGA, reducing the resource utilization when compared with the conventional implementations.
Alfonso Sánchez-Macián, Pedro Reviriego, Juan Antonio Maestro
IEEE Trans. Very Large Scale Integr. Syst.1
2014 An experimental power profile of Energy Efficient Ethernet switches
Vijay Sivaraman, Pedro Reviriego, Alfonso Sánchez-Macián, Arun Vishwanath, Juan Antonio Maestro, Craig Russell
Comput. Commun.4
2014 A Method to Extend Orthogonal Latin Square Codes
abstract
Error correction codes (ECCs) are commonly used to protect memories from errors. As multibit errors become more frequent, single error correction codes are not enough and more advanced ECCs are needed. The use of advanced ECCs in memories is, however, limited by their decoding complexity. In this context, one-step majority logic decodable (OS-MLD) codes are an interesting option as the decoding is simple and can be implemented with low delay. Orthogonal Latin squares (OLS) codes are OS-MLD and have been recently considered to protect caches and memories. The main advantage of OLS codes is that they provide a wide range of choices for the block size and the error correction capabilities. In this brief, a method to extend OLS codes is presented. The proposed method enables the extension of the data block size that can be protected with a given number of parity bits thus reducing the overhead. The extended codes are also OS-MLD and have a similar decoding complexity to that of the original OLS codes. The proposed codes have been implemented to evaluate the circuit area and delay needed for different block sizes.
Pedro Reviriego, Salvatore Pontarelli, Alfonso Sánchez-Macián, Juan Antonio Maestro
IEEE Trans. Very Large Scale Integr. Syst.3
2012 Low Power embedded DRAM caches using BCH code partitioning
abstract
Technology advances have recently enabled the use of DRAMs into logic integrated circuits. These embedded DRAMs can be used to efficiently implement caches since DRAMs require substantially less area than SRAMs. One challenge for DRAM based caches is that a small time between refreshes is needed to ensure data retention. These refreshes increase the power consumption even when the cache is idle. To mitigate this issue, the use of longer times between refreshes combined with the use of Error Correction Codes (ECCs) has been recently proposed. The idea is that the time between refreshes can be increased significantly while only causing data retention failures on a small percentage of the cells. Then those errors can be corrected by the ECC. For this scheme to be efficient the number of additional bits required by the ECC should be small. This is achieved by using large data blocks for the ECC which in turns means that a large data block has to be accessed even when only a small portion of it is needed. This has no effect on idle power consumption but increases the dynamic power consumption and reduces the effective memory bandwidth. In this paper, a technique to mitigate this issue is proposed. It enables better granularity in the read data accesses by partitioning the ECC block into two sub-blocks and modifying the error detection and correction processes. This reduces the dynamic power consumption and increases the available memory bandwidth while requiring only a moderate increase in the number of additional bits.
Pedro Reviriego, Alfonso Sánchez-Macián, Juan Antonio Maestro
IOLTS2
2011 Using Coordinated Transmission with Energy Efficient Ethernet
Pedro Reviriego, Kenneth J. Christensen, Alfonso Sánchez-Macián, Juan Antonio Maestro
Networking (1)3
2008 A system for monitoring, assessing and certifying Quality of Service in telematic services
Alfonso Sánchez-Macián, Jorge E. López de Vergara, Encarna Pastor, Luis Bellido
Knowl. Based Syst.1