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Osman Abou-Rabia

dblp:37/5767 · DBLP profile ↗
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1ranked-venue papers
0as first author
0since 2021 · last 1987
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 1

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
1 paper
High-performance computing · 50% Parallel and multicore computing · 50%

Topics — the 6 heaviest of 6, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
High-performance computing
parallel numerical algorithms
0.011987
Parallel Block Predictor-Corrector Methods for ode's · IEEE Trans. Computers 1987
Parallel and multicore computing › parallel computing › parallel scientific computing
parallel ODE solvers
0.011987
Parallel Block Predictor-Corrector Methods for ode's · IEEE Trans. Computers 1987
Parallel and multicore computing
parallel programming models
0.011987
Parallel Block Predictor-Corrector Methods for ode's · IEEE Trans. Computers 1987
High-performance computing
scientific computing systems
0.011987
Parallel Block Predictor-Corrector Methods for ode's · IEEE Trans. Computers 1987
High-performance computing
distributed memory systems
0.011987
Parallel Block Predictor-Corrector Methods for ode's · IEEE Trans. Computers 1987
Parallel and multicore computing
parallel computing
0.011987
Parallel Block Predictor-Corrector Methods for ode's · IEEE Trans. Computers 1987

Methods — techniques the papers use, named apart from their topics

variable stepsize · 0.0block predictor-corrector · 0.0
YearPublicationVenuePosition
1987 Parallel Block Predictor-Corrector Methods for ode's
abstract
The problem of achieving parallelism in the solution of the ordinary differential equations is investigated in this paper. The study focuses on an examination of block methods as a practical means for conveniently distributing the computational workload over multiple processors. Both previously suggested and newly proposed predictor-corrector formula pairs are presented and analyzed and a variable stepsize procedure is developed. The performance of two particular members of the block predictor-corrector class is evaluated experimentally using a collection of test problems. A multimicroprocessor system architecture which uses a distributed memory to deal with the interprocessor communications problem is described as a feasible hardware realization of the approach.
Louis G. Birta, Osman Abou-Rabia
IEEE Trans. Computers2