Abstract Hafnium (Hf) oxide-based ferroelectric materials have emerged as a transformative platform for next-generation non-volatile memory and advanced computing technologies. This review comprehensively examines the development, challenges, and applications of HfO 2 ferroelectrics, emphasizing their CMOS compatibility, scalability, and robust polarization at nanoscale dimensions. Breakthroughs in doping strategies, stress engineering, and VO control have stabilized the metastable orthorhombic phase, enabling high-performance devices such as ferroelectric RAM (FeRAM), ferroelectric field-effect transistors (FeFETs), and ferroelectric tunnel junctions (FTJs). These devices offer ultrafast switching, low power consumption, and multi-level storage, driving innovations in neuromorphic computing, in-memory processing, and cryogenic systems; nonetheless, they face ongoing challenges in reliability, such as fatigue and imprint effects, and scalability at sub-5 nm technology nodes. Emerging frontiers, such as wurtzite-structured nitrides (e.g., AlScN) and antiferroelectric ZrO 2 -based systems, have garnered significant attention due to their exceptionally high remanent polarization and promising potential for enhanced endurance, respectively. Further addressing the reliability issues of these emerging ferroelectric materials and the challenges associated with large-scale integration processes through interdisciplinary efforts will unlock the full potential of ferroelectric technologies, positioning them as pivotal enablers of post-Moore computing architectures and sustainable AI-driven applications.

A memristive stateful logic circuit can provide a non-von Neumann computing architecture for integrating computation and storage. However, the stateful logic circuit based on memristors presents challenges in terms of computational complexity, reconfigurability, crossbar array compatibility, and sneak path problems. In this article, we propose a fully memristive circuit structure, which realizes all 16 Boolean logic operations with the same circuit topology. Because of the use of the same logic variable for input and output, no additional circuitry is required for logic cascading, which is beneficial to enable complicated computing tasks. The proposed stateful logic operations are experimentally demonstrated within Cu/CuI/Pt memristor crossbar array. The application of the presented logic design is further extended to a one-transistor–one-memristor (1T1M) crossbar array, overcoming the sneak path problem. Moreover, stateful logic operations can be performed in columns, rather than solely in rows, improving the computing capability and flexibility of the 1T1M array. The feasibility and reliability of this logic design in a 1T1M array are verified using two case studies of the adder–subtractor combination and the multiplexer. Our presented logic design shows superior performance in logic completeness, computational complexity, reconfigurability, logic cascading, parallel computing, and sneak path, which opens up an avenue for next-generation in-memory computing.