An efficient hardware implementation scheme is proposed for iterative multi‐input–multi‐output orthogonal frequency‐division multiplexing receiver which includes an MMSE‐IC (minimum‐mean‐square error interference cancellation) detector, a channel estimator, a low‐density parity‐check (LDPC) decoder and other supporting modules. The proposed implementation uses the QR decomposition (QRD) of the complex‐valued matrices with four coordinate rotation digital computer (CORDIC) cores and a back substitution to solve the MMSE‐IC equations while the existing systolic array architectures require 15–38 CORDIC cores to achieve a similar throughput. The proposed 4‐CORDIC QRD architecture can be configured as a 16‐matrix or a 64‐matrix pipelining by using a different number of multipliers combined with one‐dimensional (1D) or 2D arrays of the back substitution, respectively. The channel estimator implements a commonly‐used frequency domain least squares channel estimation with the canonic‐signed‐digits method, thanks to the character of the Zadroff‐Chu sequence used as the pilot. In the LDPC decoder, the min‐sum algorithm is implemented for the quasicyclic LDPC decoding. The two schemes for the MMSE‐IC detector with different throughput and resource usages have been implemented in a Field Programmable Gate Array for a complete baseband turbo receiver. Their resource usages, throughputs and latencies are compared with the classic systolic array architectures, which demonstrate that the proposed receiver architecture achieves the best tradeoff between the throughput and the resource usage.

A low-resource implementation of QR decomposition (QRD) is proposed for MIMO-OFDM systems that employ turbo MMSE-IC (Minimum mean square error interference cancellation) detector. The proposed implementation uses only four CORDIC cores for QR decomposition of complex-valued matrices while existing systolic array architecture requires 15 to 38 CORDIC cores to achieve similar throughput. For 4-by-4 MIMO with 1024 subcarrier OFDM, the turbo MMSE-IC requires 1024 QRD of 4-by-4 complex matrices followed by back substitution. Each matrix QRD is accompanied by rotations of four vectors for the second and subsequent turbo iterations. The proposed architecture implements the multiple vector rotation by multipliers rather than CORDIC cores, thus saving resources. When combined with a 2-dimensional array of back substitution, the proposed QRD architecture can achieve 64-matrix pipelining and a throughput of seven clocks per matrix for MMSE-IC calculation. The proposed MMSE-IC architecture has been implemented in Altera Stratix IV FPGA with LDPC decoding and other baseband receiver components.

This paper successfully implements compressed sensing (CS) to a near-field wideband 3-D synthetic aperture radar (SAR) imaging system. SAR data are measured at a low percentage of random-selected positions on a uniform grid of planar aperture in the stripmap mode. The near-field 3-D range migration algorithm (RMA) is used in combination with the CS principle to reconstruct the 3-D image via l1regularized least-square approach. Experiments were performed with Q-band stepped-frequency monostatic stripmap SAR imaging system on a blue foam embedded with eight rubber pads and one copper square chip. The results of the experiments show near-field 3-D image of the specimen under test (SUT) can be reconstructed efficiently from low percentage of the full measurement positions, which largely lessens the data collection load. The reconstructed image was better focused and denoised.

Two proportionate affine projection sign algorithms (APSAs) are proposed for system identification applications, such as network echo cancellation (NEC), where the impulse response is often real-valued with sparse coefficients and long filter length. The proposed proportionate-type algorithms can achieve fast convergence and low steady-state misalignment by adopting a proportionate regularization matrix to the APSA. Benefiting from the characteristic of Zi-norm algorithms, affine projection, and proportionate matrix, the new algorithms are robust to impulsive interferences and colored input, and achieve much faster convergence rate in sparse impulse responses than the original APSA, the normalized sign algorithm (NSA), and the proportionate least mean square (PNLMS) algorithm. The computational complexity of the new algorithms is lower than the affine projection algorithm (APA) family due to elimination of matrix inversion.

Two proportionate affine projection sign algorithms (APSAs) are proposed for network echo cancellation (NEC) applications where the impulse response is often real-valued with sparse coefficients and long filter length. The proposed proportionate-type algorithms can achieve fast convergence and low steady-state misalignment by adopting a proportionate regularization matrix to the APSA. Benefiting from the characteristics of l1-norm optimization, affine projection, and proportionate matrix, the new algorithms are more robust to impulsive interferences and colored input than the proportionate least mean squares (PNLMS) algorithm and the robust proportionate affine projection algorithm (Robust PAPA). The new algorithms also achieve much faster convergence rate in sparse impulse responses than the original APSA and the normalized sign algorithm (NSA). The new algorithms are robust to all types of NEC impulse response with different sparseness without the need to change parameters or estimate the sparseness of the impulse response. The computational complexity of the new algorithms is lower than the affine projection algorithm (APA) family due to the elimination of the matrix inversion.