The increasing demand for efficient millimeter-wave (mmWave) beam management in wireless communication systems of 5G, 6G and beyond necessitates innovative approaches to mitigate the resource-intensive and latency-prone nature of exhaustive search methods. This paper presents a novel approach leveraging FPGA-accelerated real-time ray tracing for dynamic beam management. The proposed method dynamically reduces the number of beam directions and burst periodicity based on the mobility and density of mobile devices, as well as the presence of obstacles and available propagation paths. By utilizing a digital twin and real-time ray tracing, the system estimates the required beam directions, enabling adaptive beam management that allows to respond to dynamic obstacles and user mobility. The efficacy of the proposed methodology is showcased in an initial vehicular logistics scenario and can be transferred to further scenarios like intelligent transportation systems and others. Within the sample scenario, the resource overhead is reduced to roughly a third, while the utilization of the base station antenna's beamforming gain is significantly improved.

With the development of wireless communication technology, complex and dynamic scenarios pose great challenges to the Quality of Service (QoS) of wireless communication, especially in indoor scenarios. The quality of beam management can be greatly improved if signal ray-tracing module is embedded in wireless devices to handle synthetic multipath transmissions in real time. In this article, a novel reflection path derivation algorithm for ray tracing of signal beams is proposed, which builds the core mechanism of the proposed FPGA accelerator for ray tracing: by decomposing the computation of the entire ray path into mutually independent subproblems associated with the respective planes involved in the reflection and implemented by independent processing element on FPGAs, the parallelization of the entire ray tracing is realized, which significantly improves the convergence speed of the ray tracing; meanwhile, a new high-level synthesis workflow corresponds to the proposed algorithm and hardware architecture is proposed, which opens the door on synthesizing embedded hardware dedicated for robust and real-time wireless communication. After validation, the method proposed in this article can generate FPGA accelerator for real-time ray-tracing effectively, which achieves ray-tracing simulation in milliseconds.