Demo Data from VLDB 2026 / reviewers in the wild / expert
Shengyu Ye
dblp:387/9515
· DBLP profile ↗
8ranked-venue papers
2as first author
8since 2021 · last 2026
—ORCID · unresolved
Domains — the database's venue-derived domains; a paper can count in several
Artificial intelligence and machine learning · 5 · 1 first-author · 5 since 2021Systems, architecture and hardware · 2 · 2 since 2021Graphics, computer vision, multimedia, augmented reality and games · 2 · 1 first-author · 2 since 2021
Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.
| Software engineering, system software, and programming languages
4 papers |
Program synthesis and code generation · 32% Software testing · 23% Program verification · 16% | |
| Artificial intelligence
3 papers |
Efficient and distributed learning · 69% Representation and self-supervised learning · 19% Language models and text generation · 12% | |
| Computer architecture, parallel and distributed computing, and storage systems
1 paper |
Hardware accelerators and domain-specific architectures · 100% |
Topics — the 12 heaviest of 16, each with the papers that count most for it
| Topic | Weight | Papers | Last | Evidence papers |
|---|---|---|---|---|
Software testing
test generation |
1.0 | 1 | 2026 | Themis: Automated Constraint-Aware Test Synthesis Framework for Code Reinforcement Learning · AAAI 2026 |
Machine learning › Efficient and distributed learning
model compression |
0.9 | 1 | 2025 | LUT-DLA: Lookup Table as Efficient Extreme Low-Bit Deep Learning Accelerator · HPCA 2025 |
Machine learning › Representation and self-supervised learning
vector quantization |
0.9 | 1 | 2025 | LUT-DLA: Lookup Table as Efficient Extreme Low-Bit Deep Learning Accelerator · HPCA 2025 |
Program synthesis and code generation
code generation with language models |
0.9 | 1 | 2025 | VERSE: Verification-based Self-Play for Code Instructions · AAAI 2025 |
Hardware accelerators and domain-specific architectures › machine learning accelerator
DNN accelerator |
0.9 | 1 | 2025 | LUT-DLA: Lookup Table as Efficient Extreme Low-Bit Deep Learning Accelerator · HPCA 2025 |
Machine learning › Efficient and distributed learning › model compression › quantization
post-training quantization |
0.8 | 1 | 2024 | VPTQ: Extreme Low-bit Vector Post-Training Quantization for Large Language Models · EMNLP 2024 |
Machine learning › Efficient and distributed learning › model compression › quantization › low-bit quantization
ultra-low-bit quantization |
0.8 | 1 | 2024 | VPTQ: Extreme Low-bit Vector Post-Training Quantization for Large Language Models · EMNLP 2024 |
Compilers and program optimization
code generation |
0.8 | 1 | 2024 | Optimizing Code Retrieval: High-Quality and Scalable Dataset Annotation through Large Language Models · EMNLP 2024 |
Software maintenance and evolution
code search |
0.8 | 1 | 2024 | Optimizing Code Retrieval: High-Quality and Scalable Dataset Annotation through Large Language Models · EMNLP 2024 |
Natural language and speech › Language models and text generation
code generation |
0.3 | 1 | 2026 | Themis: Automated Constraint-Aware Test Synthesis Framework for Code Reinforcement Learning · AAAI 2026 |
Software testing
execution-based verification |
0.3 | 1 | 2025 | VERSE: Verification-based Self-Play for Code Instructions · AAAI 2025 |
Natural language and speech › Language models and text generation
large language model inference |
0.2 | 1 | 2024 | VPTQ: Extreme Low-bit Vector Post-Training Quantization for Large Language Models · EMNLP 2024 |
Methods — techniques the papers use, named apart from their topics
large language model · 3.6template-guided parsing · 2.0reinforcement learning · 2.0LUTBoost · 1.7self-training · 0.9self-play · 0.9multistage training · 0.9multi-stage training · 0.9instruction tuning · 0.9data synthesis pipeline · 0.9vector post-training quantization · 0.8function call graph analysis · 0.8
| Year | Publication | Venue | Position |
|---|---|---|---|
| 2026 | Themis: Automated Constraint-Aware Test Synthesis Framework for Code Reinforcement LearningabstractReinforcement learning (RL) has shown promise for enhancing code generation capabilities in large language models (LLMs), yet its effectiveness critically depends on high-quality test suites for reliable reward signals. Current approaches suffer from inadequate test case quantity and quality, leading to false positives (incorrect solutions passing verification) and slow positives (valid but suboptimal implementations), which corrupt RL training dynamics. We address these challenges through three key contributions: (1) We systematically analyze how low-quality test suites degrade Code RL performance via reward misalignment; (2) We propose Themis, an automated framework that transforms test case generation into code synthesis—first extracting problem constraints via template-guided parsing, then generating executable test generators through LLM-powered code synthesis, and finally validating tests through constraint-aware filtering; (3) We develop an error-guided test case reduction method that preserves error detection efficacy while reducing test set cardinality, thereby enhancing reinforcement learning training efficiency. Evaluated on programming competition datasets, Themis achieves 95 percent error detection rates, outperforming original test suites in most of the cases. When integrated into RL pipelines, models trained with Themis-generated tests demonstrate consistent 3-5 percent improvements across HumanEval, MBPP, and LiveCodeBench compared to the baseline, matching performance levels achieved with manually curated test suites. Our constraint-aware test synthesis framework ensures full automation while preserving semantic validity—critical for scaling RL training to complex code generation tasks. The framework's modular design also enables seamless integration with existing code data synthesis frameworks. Shengyu Ye, Qi Liu 0003, Hao Jiang 0023, Zheng Zhang 0048, Zhenya Huang |
AAAI | 1 |
| 2026 | LUT-LLM: Efficient Language Model Inference with Memory-based Computations on FPGAsabstractThe rapid development of large language models (LLM) has greatly enhanced everyday applications. While many FPGA-based accelerators, with flexibility for fine-grained data control, exhibit superior speed and energy efficiency compared to GPUs, recent GPU-specific optimizations have diminished this advantage. When limited to arithmetic-based computation, FPGAs often underperform GPUs due to their comparatively fewer computational resources. To address this challenge, we exploit a key advantage of FPGAs over GPUs: abundant distributed on-chip memory embedded among computational units. We believe that shifting LLM inference from arithmetic-based to memory-based computations through table lookups can improve the efficiency on FPGAs to compete with GPUs. However, existing methods are inefficient or unable to scale and deploy language models due to algorithm and architecture design limitations. This paper introduces LUT-LLM1, the first FPGA accelerator that deploys 1B+ language model with memory-based computation, leveraging vector quantization. We construct a performance model, evaluate multiple quantization schemes, and identify the activation-weight vector co-quantization as the most effective approach. To support this scheme, LUT-LLM features (1) a bandwidth-aware parallel centroid search to reduce decoding latency, (2) efficient 2D table lookups, and (3) a spatial-temporal hybrid design to reduce data caching for a higher throughput table lookup. We develop a training recipe that converts existing models to support table lookups with high accuracy and prototype LUT-LLM for Qwen 3 1.7B model on the AMD V80 FPGA, reducing arithmetic operations by 4× and achieving a 1.10∼3.29× faster generation speed and a 3.05∼6.60× higher energy efficiency than GPUs. Zifan He, Shengyu Ye, Rui Ma 0021, Yang Wang 0053, Jason Cong |
FCCM | 2 |
| 2025 | VERSE: Verification-based Self-Play for Code InstructionsabstractInstruction-tuned Code Large Language Models (Code LLMs) have excelled in diverse code-related tasks, such as program synthesis, automatic program repair, and code explanation. To collect training datasets for instruction-tuning, a popular method involves having models autonomously generate instructions and corresponding responses. However, the direct generation of responses does not ensure functional correctness, a crucial requirement for generating responses to code instructions. To overcome this, we present Verification-Based Self-Play (VERSE), aiming to enhance model proficiency in generating correct responses. VERSE establishes a robust verification framework that covers various code instructions. Employing VERSE, Code LLMs engage in self-play to generate instructions and corresponding verifications. They evaluate execution results and self-consistency as verification outcomes, using them as scores to rank generated data for self-training. Experiments show that VERSE improves multiple base Code LLMs (average 7.6%) across various languages and tasks on many benchmarks, affirming its effectiveness. Hao Jiang 0023, Qi Liu 0003, Rui Li 0093, Yuze Zhao, Shengyu Ye, Junyu Lu 0003, Yu Su 0002 |
AAAI | 6 |
| 2025 | LUT-DLA: Lookup Table as Efficient Extreme Low-Bit Deep Learning AcceleratorabstractThe emergence of neural network capabilities invariably leads to a significant surge in computational demands due to expanding model sizes and increased computational complexity. To reduce model size and lower inference costs, recent research has focused on simplifying models and designing hardware accelerators using low-bit quantization. However, due to numerical representation limits, scalar quantization cannot reduce bit width lower than 1-bit, diminishing its benefits. To break through these limitations, we introduce LUT-DLA, a Look-Up Table (LUT) Deep Learning Accelerator Framework that utilizes vector quantization to convert neural network models into LUTs, achieving extreme low-bit quantization. The LUT-DLA framework facilitates efficient and cost-effective hardware accelerator designs and supports the LUTBoost algorithm, which helps to transform various DNN models into LUT-based models via multistage training, drastically cutting both computational and hardware overhead. Additionally, through co-design space exploration, LUT-DLA assesses the impact of various model and hardware parameters to fine-tune hardware configurations for different application scenarios, optimizing performance and efficiency. Our comprehensive experiments show that LUT-DLA achieves improvements in power efficiency and area efficiency with gains of 1.4~7.0× and 1.5~146.1×, respectively, while maintaining only a modest accuracy drop. For CNNs, accuracy decreases by 0.1%~3.1% using the L2distance similarity, 0.1%~3.4% with the L1distance similarity, and 0.1%~3.8% when employing the Chebyshev distance similarity. For transformer-based models, the accuracy drop ranges from 1.4% to 3.0%. Shengyu Ye, Chunyun Chen, Yang Wang 0053, Fan Yang 0024, Ting Cao 0003, Cheng Liu 0008, Mohamed M. Sabry, Mao Yang 0004 |
HPCA | 2 |
| 2025 | CursorCore: Assist Programming through Aligning AnythingabstractLarge language models have been successfully applied to programming assistance tasks, such as code completion, code insertion, and instructional code editing. However, these applications remain insufficiently automated and struggle to effectively integrate various types of information during the programming process, including coding history, code context, and user instructions. In this work, we propose a new framework that comprehensively integrates these information sources, collect data to train our models and evaluate their performance. Firstly, to thoroughly evaluate how well models align with different types of information and the quality of their outputs, we introduce a new benchmark, APEval (Assist Programming Eval), to comprehensively assess the performance of models in programming assistance tasks. Then, for data collection, we develop a data generation pipeline, Programming-Instruct, which synthesizes training data from diverse sources, such as GitHub and online judge platforms. This pipeline can automatically generate various types of messages throughout the programming process. Finally, using this pipeline, we generate 219K samples, fine-tune multiple models, and develop the CursorCore series. We show that CursorCore outperforms other models of comparable size. This framework unifies applications such as inline chat and automated editing, contributes to the advancement of coding assistants. Hao Jiang 0023, Qi Liu 0003, Rui Li 0093, Shengyu Ye, Shijin Wang 0001 |
ICML | 4 |
| 2025 | Iterative ESPRIT Algorithm for DoA Estimation in Integrated OAM Radar-Communication SystemsabstractThis paper investigates the problem of direction-of-arrival (DoA) estimation in integrated orbital angular momentum (OAM) radar-communication systems. Unlike previous studies, we consider a more realistic and challenging scenario where coherent signals result from mainlobe overlap among echoes from multiple targets. To tackle this issue, we propose an iterative DoA estimation framework based on the estimation of signal parameters via rotational invariance techniques (ESPRIT) algorithm. Specifically, the coherent echo signals are forcibly decoupled to form a data set comprising multiple independent components, each associated with the DoA of a specific target. A novel iterative estimation strategy is then introduced, wherein a recursive ESPRIT algorithm is sequentially applied to each component during each iteration to extract the corresponding DoA information. The estimated angles are subsequently used to update the data set for the next iteration. This alternating process continues until the DoA estimates converge to the true values. Simulation results demonstrate the effectiveness and robustness of the proposed method under coherent echo conditions. Shengyu Ye, Wen-Xuan Long, Marco Moretti, Rui Chen 0001 |
VTC2025-Fall | 1 |
| 2024 | Optimizing Code Retrieval: High-Quality and Scalable Dataset Annotation through Large Language ModelsabstractCode retrieval aims to identify code from extensive codebases that semantically aligns with a given query code snippet.Collecting a broad and high-quality set of query and code pairs is crucial to the success of this task.However, existing data collection methods struggle to effectively balance scalability and annotation quality.In this paper, we first analyze the factors influencing the quality of function annotations generated by Large Language Models (LLMs).We find that the invocation of intra-repository functions and third-party APIs plays a significant role.Building on this insight, we propose a novel annotation method that enhances the annotation context by incorporating the content of functions called within the repository and information on third-party API functionalities.Additionally, we integrate LLMs with a novel sorting method to address the multi-level function call relationships within repositories.Furthermore, by applying our proposed method across a range of repositories, we have developed the Query4Code dataset.The quality of this synthesized dataset is validated through both model training and human evaluation, demonstrating high-quality annotations.Moreover, cost analysis confirms the scalability of our annotation method. 1 Rui Li 0093, Qi Liu 0003, Liyang He, Zheng Zhang 0048, Hao Zhang 0088, Shengyu Ye, Junyu Lu 0003, Zhenya Huang |
EMNLP | 6 |
| 2024 | VPTQ: Extreme Low-bit Vector Post-Training Quantization for Large Language ModelsabstractScaling model size significantly challenges the deployment and inference of Large Language Models (LLMs).Due to the redundancy in LLM weights, recent research has focused on pushing weight-only quantization to extremely low-bit (even down to 2 bits).It reduces memory requirements, optimizes storage costs, and * Contribution during internship at Microsoft Research Jicheng Wen, Yang Wang 0053, Shengyu Ye, Li Lyna Zhang, Ting Cao 0003, Cheng Li 0001, Mao Yang 0004 |
EMNLP | 4 |