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Haikang Shan

dblp:389/1288 · DBLP profile ↗
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1ranked-venue papers
0as first author
1since 2021 · last 2024
0009-0009-9954-8191ORCID · reported

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 1 · 1 since 2021

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
1 paper
Distributed systems · 72% Memory systems · 22% Interconnection networks and networks-on-chip · 6%

Topics — the 6 heaviest of 6, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Distributed systems
concurrency control
0.812024
Scythe: A Low-latency RDMA-enabled Distributed Transaction System for Disaggregated Memory · ACM Trans. Archit. Code Optim. 2024
Distributed systems › distributed database
distributed transactions
0.812024
Scythe: A Low-latency RDMA-enabled Distributed Transaction System for Disaggregated Memory · ACM Trans. Archit. Code Optim. 2024
Memory systems
memory disaggregation
0.812024
Scythe: A Low-latency RDMA-enabled Distributed Transaction System for Disaggregated Memory · ACM Trans. Archit. Code Optim. 2024
Distributed systems › concurrency control
optimistic concurrency control
0.812024
Scythe: A Low-latency RDMA-enabled Distributed Transaction System for Disaggregated Memory · ACM Trans. Archit. Code Optim. 2024
Distributed systems › remote procedure call
RDMA-based RPC
0.212024
Scythe: A Low-latency RDMA-enabled Distributed Transaction System for Disaggregated Memory · ACM Trans. Archit. Code Optim. 2024
Interconnection networks and networks-on-chip
remote direct memory access
0.212024
Scythe: A Low-latency RDMA-enabled Distributed Transaction System for Disaggregated Memory · ACM Trans. Archit. Code Optim. 2024

Methods — techniques the papers use, named apart from their topics

timestamp-ordered OCC · 0.8fair locking · 0.8RDMA · 0.8
YearPublicationVenuePosition
2024 Scythe: A Low-latency RDMA-enabled Distributed Transaction System for Disaggregated Memory
abstract
Disaggregated memory separates compute and memory resources into independent pools connected by RDMA (Remote Direct Memory Access) networks, which can improve memory utilization, reduce cost, and enable elastic scaling of compute and memory resources. However, existing RDMA-based distributed transactions on disaggregated memory suffer from severe long-tail latency under high-contention workloads. In this article, we propose Scythe, a novel low-latency RDMA-enabled distributed transaction system for disaggregated memory. Scythe optimizes the latency of high-contention transactions in three approaches: (1) Scythe proposes a hot-aware concurrency control policy that uses optimistic concurrency control (OCC) to improve transaction processing efficiency in low-conflict scenarios. Under high conflicts, Scythe designs a timestamp-ordered OCC (TOCC) strategy based on fair locking to reduce the number of retries and cross-node communication overhead. (2) Scythe presents an RDMA-friendly timestamp service for improved timestamp management. And, (3) Scythe designs an RDMA-optimized RPC framework to improve RDMA bandwidth utilization. The evaluation results show that, compared with state-of-the-art distributed transaction systems, Scythe achieves more than 2.5× lower latency with 1.8× higher throughput under high-contention workloads.
Kai Lu 0002, Siqi Zhao, Haikang Shan, Guokuan Li, Jiguang Wan 0001, Ting Yao 0001, Huatao Wu, Daohui Wang
ACM Trans. Archit. Code Optim.3