Demo Data from VLDB 2026 / reviewers in the wild / expert
Xike Li
dblp:39/156
· DBLP profile ↗
4ranked-venue papers
2as first author
2since 2021 · last 2025
0009-0009-2049-5729ORCID · reported
Domains — the database's venue-derived domains; a paper can count in several
Computer networks · 2 · 2 first-authorArtificial intelligence and machine learning · 1 · 1 since 2021Applied, interdisciplinary, general and emerging computing · 1 · 1 since 2021
Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.
| Computer networks
1 paper |
Routing and switching · 50% Wireless networking · 50% | |
| Computer architecture, parallel and distributed computing, and storage systems
1 paper |
Performance modeling and evaluation · 100% |
Topics — the 3 heaviest of 3, each with the papers that count most for it
| Topic | Weight | Papers | Last | Evidence papers |
|---|---|---|---|---|
Wireless networking › scheduling › transmission scheduling
frame scheduling |
0.1 | 1 | 2008 | Stability of a frame-based oldest-cell-first maximal weight matching algorithm · IEEE Trans. Commun. 2008 |
Routing and switching
switch scheduling |
0.1 | 1 | 2008 | Stability of a frame-based oldest-cell-first maximal weight matching algorithm · IEEE Trans. Commun. 2008 |
Performance modeling and evaluation
queueing models |
0.0 | 1 | 2008 | Stability of a frame-based oldest-cell-first maximal weight matching algorithm · IEEE Trans. Commun. 2008 |
Methods — techniques the papers use, named apart from their topics
stability analysis · 0.2oldest-cell-first policy · 0.2
| Year | Publication | Venue | Position |
|---|---|---|---|
| 2025 | Adaptive spatial and scale label assignment for anchor-free object detection
Min Dang, Gang Liu 0006, Di Wang 0011, Xike Li, Quan Wang 0006 |
Pattern Recognit. | 5 |
| 2025 | Object Detector Based on Center Keypoints for Behavior Recognition in Classroom ScenesabstractStudent pose information can reflect learning status, which is significant in teaching management and evaluation. However, the traditional manual behavior recognition and analysis process is complex and slow, so counting massive classroom data is a difficult task. Therefore, using computer vision technology to accurately recognize student behavior is of great significance to teaching management and evaluation. Besides, the performance of existing behavior recognition methods is limited by problems such as dense objects and occlusion in classroom scenes. To address these issues, we propose an anchor-free object detector based on center keypoints for behavior recognition in classroom scenes. Specifically, we design a multiscale convolution neural networks (CNNs) module to alleviate the scale variation of objects through multiscale receptive fields. The head network is based on the anchor-free detection head architecture and integrates the keypoint heatmaps to accurately extract the center keypoint position through the center pooling module (CPM). the CPM can suppress irrelevant background information and effectively alleviate the missed detection of dense objects. Regressing the distances from the center keypoint of the positive region to the four sides can suppress low-quality bounding boxes so that the detector can accurately locate the object. Furthermore, during the inference stage, the heatmap scores of keypoints and center keypoints are linearly combined as novel confidence to mitigate inaccurate measurement of predicted bounding boxes. The extensive experimental performance comparison on the classroom behavior (CB) and SCB-dataset3 benchmark datasets demonstrate that the proposed behavior recognition method can accurately detect objects in classroom scenes. Compared with other current state-of-the-art methods, the proposed behavior recognition method based on anchor-free object detector is able to achieve good performance. Min Dang, Gang Liu 0006, Xike Li, Bo Wan 0002, Rong Pan 0004 |
IEEE Trans. Comput. Soc. Syst. | 3 |
| 2008 | Stability of a frame-based oldest-cell-first maximal weight matching algorithmabstractInput-queued cell switches employing the oldest-cell-first (OCF) policy have been shown to yield low mean delay characteristics. Moreover, it has been proven that OCF is stable for admissible traffic conditions when executed with a scheduling speedup of 2. However, as link speeds increase, the computational complexity of these algorithms limits their applicability in high port-density switches and routers. To address the scalability issue, we describe a Frame-Based Maximal Weight Matching (FMWM) algorithm, employing OCF as queue weights, in which a new scheduling decision is issued once every several cell times. Between scheduling decisions, the configuration of the crossbar switch remains unchanged. We further extend the analysis to address the case of multiple classes of service, and prove that the algorithm is stable with an internal buffer transfer speedup of 2, thereby significantly relaxing the timing constraints imposed on the scheduling process. Xike Li, Itamar Elhanany |
IEEE Trans. Commun. | 1 |
| 2005 | A pipelined memory management algorithm for distributed shared memory switchesabstractThe distributed shared memory (DSM) packet switching architecture has attracted much attention recently, predominantly due to its ability to overcome the inherent memory-bandwidth limitation of output-queued switches. Its performance has been studied from a theoretical point of view by exploring the conditions under which it can emulate an output-queued switch. At the core of the DSM design is a memory management algorithm that determines the memory units to which arriving packets are forwarded. However, the complexity of such algorithms found to date is O(N), where N denotes the number of ports in the system, thereby inherently limiting the scalability of the scheme. In this paper, we propose a novel pipelined memory management algorithm for DSM switches which offers reduced timing complexity at the cost of fixed latency. Moreover, we demonstrate how processing and memory-access speedup factors yield a highly scalable DSM switch architecture design. Xike Li, Itamar Elhanany |
ICC | 1 |