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Young Choi

dblp:39/174 · DBLP profile ↗
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7ranked-venue papers
1as first author
1since 2021 · last 2024
—ORCID · unresolved

Domains — the database's venue-derived domains; a paper can count in several

Graphics, computer vision, multimedia, augmented reality and games · 4 · 1 first-authorSystems, architecture and hardware · 1 · 1 since 2021Computer networks · 1Applied, interdisciplinary, general and emerging computing · 1

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Interdisciplinary, comprehensive, and emerging computing
1 paper
Computational science and engineering · 100%
Theoretical computer science
1 paper
Mathematical optimization · 100%
Computer graphics and multimedia
2 papers
Geometric modeling and processing · 54% Computational fabrication · 38% Visualization and visual analytics · 8%

Topics — the 6 heaviest of 6, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Computational science and engineering
computational geometry
0.412020
Concurrent density distribution and build orientation optimization of additively manufactured functionally graded lattice structures · Comput. Aided Des. 2020
Mathematical optimization
continuous optimization
0.412020
Concurrent density distribution and build orientation optimization of additively manufactured functionally graded lattice structures · Comput. Aided Des. 2020
Computational fabrication
additive manufacturing
0.112020
Concurrent density distribution and build orientation optimization of additively manufactured functionally graded lattice structures · Comput. Aided Des. 2020
Geometric modeling and processing › mesh generation › delaunay triangulation
constrained delaunay triangulation
0.112009
CAD data visualization on mobile devices using sequential constrained Delaunay triangulation · Comput. Aided Des. 2009
Geometric modeling and processing
mesh generation
0.112009
CAD data visualization on mobile devices using sequential constrained Delaunay triangulation · Comput. Aided Des. 2009
Visualization and visual analytics › 3d visualization
CAD visualization
0.012009
CAD data visualization on mobile devices using sequential constrained Delaunay triangulation · Comput. Aided Des. 2009

Methods — techniques the papers use, named apart from their topics

density distribution optimization · 1.3build orientation optimization · 1.3sequential constrained delaunay triangulation · 0.1
YearPublicationVenuePosition
2024 A 32-Gb/s Single-Ended PAM-4 Transceiver With Asymmetric Termination and Equalization Techniques for Next-Generation Memory Interfaces
abstract
This paper presents a high-speed single-ended 4-level pulse amplitude modulation (PAM-4) transceiver for next-generation memory interfaces, achieving a data rate of 32Gb/s. The proposed asymmetrically terminated PAM-4 driver is optimized for pseudo open drain (POD) channel configurations and improves signal-to-noise ratio (SNR) with a larger output swing. The dynamic logic-based high-speed 4-to-1 serializer enhances the transmitter output’s jitter characteristic by avoiding high-frequency components in the selection signals. The 4-tap feed-forward equalizer (FFE) with two operation modes and one sliding tap flexibly compensates for inter-symbol interference (ISI) of the channel. In the receiver frontend, a continuous-time linear equalizer (CTLE), which utilizes a trans-admittance stage (TAS) and a trans-impedance amplifier (TIA) with an inductive load, provides high-frequency boosting and robust single-to-differential conversion performance through the design techniques of current source gain-boosting and capacitive compensation. The low kickback noise comparators mitigate clock feedthrough and noise coupling during multi-phase PAM-4 sampling and embed the 1-tap PAM-4 decision feedback equalizer (DFE) operation by directly feeding back the previous sampling phase’s outputs. The transceiver prototype fabricated in 28-nm CMOS technology occupies 0.126 mm2. At 32 Gb/s, a bit error rate of under$10^{-12}$was achieved with a 6.25% eye margin and an energy efficiency of 3.37 pJ/bit while equalizing the 6.87-dB channel loss at 8 GHz.
Hyuntae Kim 0002, Yunseong Jo, Eunsang Lee, Young Choi, Jaewoo Park 0007, Myoungbo Kwak, Jung-Hwan Choi, Jaeduk Han
IEEE Trans. Circuits Syst. I Regul. Pap.5
2020 Concurrent density distribution and build orientation optimization of additively manufactured functionally graded lattice structures
Cong Hong Phong Nguyen, Young Choi
Comput. Aided Des.2
2010 Triangulation of CAD data for visualization using a compact array-based triangle data structure
Sang Wook Yang, Young Choi
Comput. Graph.2
2009 CAD data visualization on mobile devices using sequential constrained Delaunay triangulation
Sang Wook Yang, Young Choi, Hyun-Chan Lee
Comput. Aided Des.2
2009 A modified advancing layers mesh generation for thin three-dimensional objects with variable thickness
Young Choi, Ki-Youn Kwon, Soo-Won Chae
Comput. Graph.1
2009 Comparison of decentralized time slot allocation strategies for asymmetric traffic in TDD systems
abstract
Recently, wireless multimedia services have been growing because of the spread of various wireless applications. Hence, time division duplex (TDD) systems and their crossed-slot interference problems in a cellular environment have been attracting growing interests. Considering large signaling overhead between cells, decentralized time slot allocation (TSA) strategy is suitable for practical implementation. Thus, Fixed-TSA strategy which fixes the same ratio of uplink and downlink time slots in all cells is adopted in commercial WiBro systems (IEEE802.16e Mobile WiMax) to mitigate the crossed-slot interference. However, the Fixed-TSA strategy reduces the flexibility in time slot allocation due to a strong constraint set by a predefined boundary. Moreover, the mathematical derivation of the optimal value for the predefined boundary has not been presented yet. In this paper, we propose two decentralized TSA strategies. The first one is Enhanced Fixed-TSA strategy, which dynamically adapts the predefined boundary of the conventional Fixed-TSA strategy according to traffic conditions. The second one is region-based Decentralized Time Slot Allocation (RED-TSA) strategy, which utilizes partial location information of MSs to reduce crossedslot interference. We fully analyze the proposed TSA strategies in terms of new call blocking probability, average bit error probability, and the overall system throughput. Numerical results show that the proposed RED-TSA strategy provides the highest system throughput by compromising both new call blocking performance and average bit error performance, whereas it requires additional location information and complicated computation. On the contrary, the proposed Enhanced Fixed-TSA strategy requires reasonable computational complexity while it provides almost the same system throughput with that of the proposed RED-TSA strategy. In a nutshell, the proposed Enhanced Fixed- TSA strategy is more appropriate for the practical systems. Moreover, it can be directly applied to the current commercial WiMax/WiBro systems with minimum changes.
Illsoo Sohn, Kwang Bok Lee, Young Choi
IEEE Trans. Wirel. Commun.3
2007 Elliptic Polygon Based 2D Sketch Interface for 3D Shape Matching
Jaeho Lee 0004, Joon Young Park, Young Choi
ICCSA (2)3