With the increasing demand for higher bandwidth and frequency in high-speed digital systems, the interference of common-mode (CM) noise in differential signal transmission has become more severe. Common-mode suppression filters (CMF) were proposed to solve this issue, but their design process typically relies on empirical parameter tuning with extensive electromagnetic simulations, which not only increases design costs but also limits efficiency and flexibility. In this paper, a transformer-based inverse design method for CMFs is proposed for the first time, and it can eliminate the need for empirical parameter adjustments by automatically predicting the targeted geometric parameters, thereby improving the design efficiency. In addition, to address the problem of imbalanced data distribution, the multilabel synthetic minority over-sampling technique (MLSMOTE), which can enhance the data representation in sparse sample regions, is implemented. Further validation on tunable CMFs confirms that the proposed inverse design method has broad applicability. The experimental results demonstrate that the proposed inverse design method can accurately predict the geometric parameters and improve the efficiency, thereby providing an innovative solution for the design and applications of CMFs.

The reliability of LDMOSFET as well as FinFET devices has been gaining much interest in the development of various space electronic systems. There are high requirements for nonlinear computation and efficient simulation of radiation-multiphysics effects in these devices, especially in large-scale 3D scenarios, which pose significant challenges. To address these issues, we propose a hybrid numerical method for massively parallel simulation of nonlinear drift-diffusion transport processes in semiconductor devices. The control volume finite element method (CV-FEM) is employed to solve the Poisson, current continuity, and heat conduction equations, which shows strong numerical stability on unstructured meshes compared with the commercial COMSOL Multiphysics software. Further, our self-developed solver is employed to explore the total ionizing dose (TID)-electrothermal synergistic effects in step-doped LDMOSFETs (SD-LDMOSFETs), high-K dielectric SD-LDMOSFETs (HKSD-LDMOSFETs), and multi-fin FinFETs (M-FinFETs). We also implement a combined domain decomposition and J parallel Adaptive Unstructured Mesh applications Infrastructure scheme for parallel computation, where the scalability of our parallel algorithm is examined. It it believed that this study can offer some new insights into the behavior of these devices under radiation and electrothermal coupling, advancing efficient numerical methods to simulate diverse radiation-electrothermal synergistic effects.

In this work, an efficient thermal-aware placement optimization framework is developed by combining a fast thermal simulation method with intelligent optimization algorithm. The fast thermal simulation method for 2.5-D advanced packaging is proposed by improving global stiffness matrix and load vector reconstruction process of traditional finite element method. Its performance is verified by comparing it with the traditional finite element method, the fast steady-state solver of the open-source HotSpot, and commercial software in terms of computational accuracy and efficiency. Then, an improved genetic algorithm, the elite immigrant primal-dual genetic algorithm is developed for effective placement optimization. By combining the fast thermal simulation method with the elite immigrant primal-dual genetic algorithm, the efficient thermal-aware placement framework for 2.5-D advanced packaging is established. The performance of the proposed optimization framework is then evaluated through several cases studies, including comparisons with optimization frameworks with other intelligent algorithms in terms of effective layout area, maximum temperature, temperature uniformity, and total wirelength. Additionally, its time efficiency is compared with frameworks based on other thermal simulation methods.

This paper proposes a novel neural network architecture combining convolutional and transposed convolutional neural networks to accurately and efficiently modelS-parameter of interconnects for 3D integration. The network incorporates physical consistency constraints, specifically causality and passivity, into its design to ensure the physical effectiveness of the output. The transposed convolutional network serves as a sub-network to map the relationship between the geometrical parameters andS-parameter for sub-structures. Then, theS-parameters of individual sub-structures are cascaded for dealing with a complex structure composed of sub-structures. A coupling neural network, with causality and passivity constraints, is developed to map the coarse cascadedS-parameters to the fine accurateS-parameters. With the help of this high-dimensional space mapping, a small amount of electromagnetic simulation data of complex interconnect structures is sufficient to learn the relationship between cascaded and realS-parameters. To ensure the completeness of the training set distribution when training CONN on small datasets, a sensitivity analysis-based training set screening method is proposed to enhance the training performance of CONN. The proposed algorithm is demonstrated in two different assemble structure applications. The results highlight the effectiveness, flexibility and versatility of the proposed architecture in modeling complex structures with small costly simulation data while maintaining accuracy and physical consistency.

In this work, a finite element method (FEM)-based numerical framework is proposed to effectively calculate the drift-diffusion equations and compiled into a parallel computing device simulator. In this framework, a novel upwind FEM is developed to solve the convection dominated continuity equations. In the implementation of the upwind method, the vector basis functions are employed to interpolate the edge streamline upwind (SU) current densities into mesh grid to obtain the spatial current density, and then the scalar FEM is used to construct the element matrix equation. Through comparing the calculating results of a 2-D PN-junction with those obtained by the COMSOL Semiconductor, the accuracy of proposed framework is verified first. Then, through several numerical cases, its advantages in comparison with FBSG-, SU Petrov Galerkin (SUPG)-, or control-volume-finite-element method SUPG-based frameworks in terms of mesh grid adaptivity, computing stability, and efficiency are presented. At last, by combining the proposed framework with a domain decomposition scheme and a fully coupled Newton’s approach, a parallel computing device simulator is developed, including both steady-state and transient solvers. The performance of the in-house simulator is evaluated in terms of calculating accuracy, large-scale problem solution capability, and scalabilities.

As an important technology in high-speed systems, equalizer (EQ) is used to mitigate inter-symbol interference (ISI) caused by inconsistent attenuation of high and low frequencies. The difficulty of signal integrity improvement increases the complexity of EQ design, making the existing algorithms inefficient in high-dimensional searching and constraint processing. In this article, a local multi-constraint modeling-Bayesian optimization (BO) with region partitioning is proposed, aiming to provide a general optimization solution for high-dimensional multi-constraint EQs and improve convergence accuracy and efficiency. The constraint filtering mechanism is used to exclude areas that violate simulation-independent constraints. Local modeling and region partitioning techniques complement each other, taking into account both the local accuracy of the model and the global search performance of the algorithm. The multi-constraint modeling strategy allows simulation-dependent constraints to be pre-judged through the surrogate model, overcoming the shortcomings of the traditional solution of adding the penalty term to the target value, which makes it difficult to balance the weights and can only judge the constraints after simulation, thereby reducing the waste of computing resources caused by simulating data that violates the constraints. The proposed algorithm is applied to EQ optimization in a 16 Gbps high-bandwidth memory channel and a 64 Gbps differential peripheral component interconnect express channel, respectively. The algorithm is developed based on PyTorch, and the eye diagrams are obtained using Keysight ADS software. Two applications are conducted on computer with Intel Core i5-13500 processor and 32 GB RAM. By utilizing the region partitioning and constraint filtering techniques, the actual number of simulations in the optimization can be significantly reduced. The experimental results demonstrate that the proposed algorithm has significant shorter computing time than traditional BO and genetic algorithm, implying its practical application potential for dealing with high-dimensional multi-constraint problems.

Memristors have been widely studied as artificial synapses in neuromorphic circuits, due to their functional similarity with biological synapses, low operating power, and high integration density. Currently, the synaptic weight symbolic limitation and weight update inaccuracy are two challenging issues to be solved. In this work, a novel memristive synapse and a matched mixed-signal neuron circuit are designed to implement robust yet accurate spike-timing-dependent plasticity learning in excitatory and inhibitory synapses. To break through the weight symbolic limitation, a four memristors and two resistors (4M2R) synapse composed of 4M2R for spiking neural network (SNN) is designed. The proposed synapse can be either excitatory or inhibitory (E/I) by rationally arranging the resistors in the circuit, and it is the first of its kind, enabling Hebbian and anti-Hebbian training without additional adjusting of neural signals. In addition, the high symmetricity, linearity, and stability against device variation of the 4M2R synapse can also greatly improve the weight update accuracy. To further address the inaccurate weight update issue caused by signal complexity, a neuron circuit is designed to generate square-wave pulses for spike transmission and synaptic weight modulation. Simulations are carried out in the MATLAB Simscape as well as Virtuoso using SMIC 0.18$\mu $m process and a specially developed memristor model for SNN synapse simulation. The simulating results show good agreement with the weight change derived from the algorithmic methods, and the influence of weak signal-induced weight variation on circuit performance can be rigorously assessed.