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Boyuan Yan

dblp:39/3790 · DBLP profile ↗
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20ranked-venue papers
7as first author
5since 2021 · last 2026
—ORCID · conflict

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 11 · 6 first-authorArtificial intelligence and machine learning · 3 · 1 since 2021Computer networks · 3 · 1 first-author · 2 since 2021Software engineering, systems software and programming languages · 1 · 1 since 2021Databases, data management, data science and information retrieval · 1 · 1 since 2021Applied, interdisciplinary, general and emerging computing · 1 · 1 since 2021

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
5 papers
Electronic design automation · 44% High-performance computing · 27% Integrated circuit design · 10%
Computer networks
2 papers
Software-defined and programmable networks · 40% Optical networks · 34% Internet architecture and protocols · 20%
Databases, data mining, and information retrieval
1 paper
Recommender systems · 100%
Artificial intelligence
1 paper
Deep learning architectures and training · 100%

Topics — the 22 heaviest of 23, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Recommender systems › generative recommendation
diffusion-based recommendation
1.012026
GSDiffRec: Enhancing Personalized Sequential Recommendation via Diffusion Augmentation and Guidance Optimization · WSDM 2026
Recommender systems
sequential recommendation
1.012026
GSDiffRec: Enhancing Personalized Sequential Recommendation via Diffusion Augmentation and Guidance Optimization · WSDM 2026
Optical networks
optical switch
0.812024
On the Performance Investigation of a Recursive Fast Optical Switch-Based High Performance Computing Network Architecture · IEEE/ACM Trans. Netw. 2024
Software-defined and programmable networks
network function virtualization
0.412020
Service Function Path Provisioning With Topology Aggregation in Multi-Domain Optical Networks · IEEE/ACM Trans. Netw. 2020
Software-defined and programmable networks › network function virtualization
service function chaining
0.412020
Service Function Path Provisioning With Topology Aggregation in Multi-Domain Optical Networks · IEEE/ACM Trans. Netw. 2020
Internet architecture and protocols › network topology
topology aggregation
0.412020
Service Function Path Provisioning With Topology Aggregation in Multi-Domain Optical Networks · IEEE/ACM Trans. Netw. 2020
Machine learning › Deep learning architectures and training
transformer
0.312026
GSDiffRec: Enhancing Personalized Sequential Recommendation via Diffusion Augmentation and Guidance Optimization · WSDM 2026
Electronic design automation › physical design
power delivery network design
0.322013
Localized Stability Checking and Design of IC Power Delivery With Distributed Voltage Regulators · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2013
Decoupling for power gating: sources of power noise and design strategies · DAC 2011
Interconnection networks and networks-on-chip
network topology
0.212024
On the Performance Investigation of a Recursive Fast Optical Switch-Based High Performance Computing Network Architecture · IEEE/ACM Trans. Netw. 2024
Integrated circuit design
analog and mixed-signal circuits
0.212013
Localized Stability Checking and Design of IC Power Delivery With Distributed Voltage Regulators · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2013
Electronic design automation › circuit analysis
circuit stability analysis
0.212013
Localized Stability Checking and Design of IC Power Delivery With Distributed Voltage Regulators · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2013
Energy-efficient computing › power delivery
on-chip voltage regulation
0.212013
Localized Stability Checking and Design of IC Power Delivery With Distributed Voltage Regulators · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2013
Electronic design automation
circuit simulation
0.222008
DeMOR: decentralized model order reduction of linear networks with massive ports · DAC 2008
SBPOR: Second-Order Balanced Truncation for Passive Order Reduction of RLC Circuits · DAC 2007
Electronic design automation › circuit simulation
model order reduction
0.222008
DeMOR: decentralized model order reduction of linear networks with massive ports · DAC 2008
SBPOR: Second-Order Balanced Truncation for Passive Order Reduction of RLC Circuits · DAC 2007
Routing and switching
inter-domain routing
0.112020
Service Function Path Provisioning With Topology Aggregation in Multi-Domain Optical Networks · IEEE/ACM Trans. Netw. 2020
Electronic design automation › physical design › power delivery network design
decoupling capacitor optimization
0.112011
Decoupling for power gating: sources of power noise and design strategies · DAC 2011
Integrated circuit design
low-power circuit design
0.112011
Decoupling for power gating: sources of power noise and design strategies · DAC 2011
Energy-efficient computing
power gating
0.112011
Decoupling for power gating: sources of power noise and design strategies · DAC 2011
Electronic design automation
power integrity
0.112011
Decoupling for power gating: sources of power noise and design strategies · DAC 2011
Electronic design automation
interconnect modeling
0.112008
DeMOR: decentralized model order reduction of linear networks with massive ports · DAC 2008
Electronic design automation › physical design
parasitic extraction
0.112008
DeMOR: decentralized model order reduction of linear networks with massive ports · DAC 2008
Electronic design automation › circuit simulation › model order reduction
balanced truncation
0.112007
SBPOR: Second-Order Balanced Truncation for Passive Order Reduction of RLC Circuits · DAC 2007

Methods — techniques the papers use, named apart from their topics

transformer · 2.0geodesic random walk · 2.0diffusion model · 2.0attention · 2.0energy and cost modeling · 1.5convex optimization · 1.5simulation · 0.4heuristic algorithm · 0.4localized stability checking · 0.2hybrid stability margin · 0.2simulation-based optimization · 0.1relative gain array · 0.1MIMO decoupling · 0.1second-order balanced truncation · 0.1congruency transformation · 0.1
YearPublicationVenuePosition
2026 GSDiffRec: Enhancing Personalized Sequential Recommendation via Diffusion Augmentation and Guidance Optimization
abstract
Sequential recommendation aims to predict the next user interaction by modeling historical behavior sequences. Recently diffusion models (DMs) have emerged as a promising generative approach due to their robustness and capacity for uncertainty modeling. However, existing diffusion-based recommendation approaches still encounter two major challenges: sample drift during the noise injection process, which compromises the stability of generation; and limited adaptability to noisy data, which hampers the effectiveness of personalized recommendations. To address these issues, we propose GSDiffRec, a novel generative sequential recommendation approach that integrates two core modules: (i) Semantic-Targeted Guidance Module (STG) built upon an enhanced Transformer backbone equipped with shaped attention and convolutional components to improve representational efficiency and modeling capacity; and (ii) Geodesic Diffusion Module (GDM) enforcing manifold constraints through geodesic random walks, thereby preserving geometric consistency and enhancing denoising stability throughout the diffusion process. Extensive experiments on two public Amazon datasets demonstrate that GSDiffRec significantly outperforms a wide range of competitive baselines. Further ablation studies validate the complementary contributions and effectiveness of the GDM and STG modules.
Ruxue Han, Lianyong Qi, Weiyi Zhong, Boyuan Yan, Xiaoran Zhao 0001, Zhikang Feng, Xiaolong Xu 0001, Haolong Xiang, Xuyun Zhang
WSDM5
2026 ST-BernT: A Spatiotemporal λ-Bernstein Graph Convolutional Network With Transformer for Multisite Air Quality Prediction in Distributed Unmanned Agent Systems
abstract
With the rapid development of ubiquitous networks and unmanned devices, air quality monitoring data is increasingly collected via wireless networks from sensors at multiple monitoring stations. However, the complexity of these data introduces significant challenges. Existing spatiotemporal methods for air quality prediction often struggle with issues such as inadequate handling of spatial relationships, difficulties in modeling long-term temporal dependencies, and limited generalization capabilities. To address these challenges, this paper proposes a novel spatiotemporal modeling approach—Spatiotemporal λ-Bernstein Graph Convolutional Network with Transformer for Multi-Site Air Quality Prediction (ST-BernT). This method constructs a graph structure based on spatiotemporal correlations, integrating a Gaussian-weighted adjacency matrix derived from geographic distances with an adjacency matrix capturing the temporal correlations of pollutant concentration time series, thereby precisely modeling spatial dependencies. Subsequently, a dynamic filter adjusted by λ-Bernstein polynomials is proposed to adaptively process spatiotemporal data characterized by the coexistence of low- and high-frequency components on the graph. Furthermore, a hierarchical generative transformer (GPHT) is introduced to enhance the model’s ability to capture long-term temporal patterns, such as periodicity and seasonality, while supporting parallel prediction across multiple sites, significantly improving computational efficiency and accuracy. Experimental results demonstrate that ST-BernT exhibits strong accuracy, adaptability, and generalization capability in multi-site air quality prediction tasks, particularly showing enhanced robustness in large-scale long-term forecasting scenarios.
Lianyong Qi, Boyuan Yan, Chunhua Hu 0001, Fei Dai 0002, Xiaolong Xu 0001, Wan-Chun Dou, Xiaokang Zhou
IEEE Internet Things J.2
2025 AGTCN: An Adaptive Gating Approach in Spatiotemporal Convolutional Networks for Accurate Air Quality Prediction
Junteng Zheng, Boyuan Yan
ICIC (7)4
2025 Optimal Subset Oracle-Based Web API Composition Recommendation for Mashup Creation
Qinghe Yan, Jiahui Dong, Boyuan Yan, Lianyong Qi, Weiyi Zhong
ICSOC (1)4
2024 On the Performance Investigation of a Recursive Fast Optical Switch-Based High Performance Computing Network Architecture
abstract
We propose a novel high performance computing (HPC) network architecture$\mathrm {HFOS}_{L}$based on$L$parallel levels distributed low radix fast optical switches (FOS). We provide a detailed description of the blade, FOS and the operation of the$\mathrm {HFOS}_{L}$network. The$\mathrm {HFOS}_{L}$HPC network is highly scalable, and HFOS4 architecture can support an extremely large HPC network of 65,536 blades under distributed FOS with the same radix of 16 in each level. In principle, the$\mathrm {HFOS}_{L}$HPC network can be built by FOSes with different radices at each level. To find out the best configuration of FOS at each level and solve the energy and cost optimization problem in$\mathrm {HFOS}_{L}$network, we break down all the components in the FOS and develop the energy and cost models for the FOS. We verify that the energy and cost per radix functions of FOS are convex functions. Given this foundation, the theoretical investigation of the energy and cost optimization problem shows that the$\mathrm {HFOS}_{L}$network could achieve the minimum energy and cost only when the FOS radices of all levels in$\mathrm {HFOS}_{L}$network are the same. Besides, the cost and power consumption of$\mathrm {HFOS}_{L}$networks are compared with a widely used Leaf-Spine network.
Fulong Yan, Xiong Deng, Changshun Yuan, Boyuan Yan, Chongjin Xie
IEEE/ACM Trans. Netw.4
2020 Routing and Resource Allocation Leveraging Self-organizing Feature Maps in Multi-core Optical Networks Against 5G and Beyond
abstract
With the rapid development of emerging services in 5G and beyond scenario, ultra-large capacity transmission has become a rigid demand for core optical networks, leaving a general trend to enter P-bit level transmission. New multiplexing technologies that further enhance fiber transmission capacity are development directions worth exploring. Due to the limit of single fiber transmission, space division multiplexing (SDM) is the main technology to increase the optical fiber transmission capacity in the future and has become a research hotspot. However, the introduction of SDM also brings some new problems, such as complex crosstalk assessment and generation of multi-dimensional resource fragments, resulting in more complex and diverse parameters affecting service transmission. If the impact of multiple parameters cannot be comprehensively evaluated, the quality of the service cannot be well guaranteed. Against this background, we propose a routing and resource allocation (RRA) scheme based on self-organizing feature maps (SOM) in core optical networks with multi-core fibers. Multiple parameters affecting service transmission will be uniformly input into the SOM model to obtain a reordered link set which will be used for the RRA process. Simulation results indicate that our presented method can reduce the fragmentation degree, decrease blocking probability, and also improve spectrum utilization.
Qiuyan Yao, Hui Yang 0006, Boyuan Yan, Bowen Bao, Ao Yu, Jie Zhang 0006
IWCMC3
2020 Service Function Path Provisioning With Topology Aggregation in Multi-Domain Optical Networks
abstract
Traffic flows are often processed by a chain of Service Functions (SFs) (known as Service Function Chaining (SFC)) to satisfy service requirements. The deployed path for a SFC is called Service Function Path (SFP). SFs can be virtualized and migrated to datacenters, thanks to the evolution of Software Defined Network (SDN) and Network Function Virtualization (NFV). In such a scenario, provisioning of paths (i.e., SFPs) between virtualized network functions is an important problem. SFP provisioning becomes more complex in a multi-domain network topology. `Topology aggregation' helps to create a single-domain view of such a network by abstracting multi-domain networks. However, traditional `topology aggregation' methods are unable to abstract SF resources properly, which is required for SFP provisioning. In this paper, we propose an SFC-Oriented Topology Aggregation (SOTA) method to enable abstraction for SFs in multi-domain optical networks. This study explores the node and the link aggregation degree to evaluate information compression during the `Topology aggregation' process. Additionally, we also propose a new data structure named wheel matrix and related operations to store routing information in the aggregated topology. Based on SOTA, we propose two cross-domain SFP provisioning algorithms named Ordered Anchor Selection (OAS) and ${k}$ -paths OAS (K-OAS), and a benchmark named Global OAS (GOAS). Simulation results show that SOTA could aggregate large-scale multi-domain optical networks into a small network that contains only 6.9% of the nodes and 10.1% of the links. Both OAS and K-OAS can calculate SFPs efficiently and reduce blocking probability up to 52.10% compared to the benchmark.
Boyuan Yan, Yongli Zhao 0001, Xiaosong Yu, Yajie Li 0001, Sabidur Rahman, Yongqi He, Xiangjun Xin 0001, Jie Zhang 0006
IEEE/ACM Trans. Netw.1
2013 Localized Stability Checking and Design of IC Power Delivery With Distributed Voltage Regulators
abstract
Placing multiple voltage regulators onto the die is an effective way of enabling distributed on-chip voltage regulation and provides significant benefits in suppressing various types of power supply noise. However, the complex interactions between the active voltage regulators and the large passive subnetwork may render the complete power delivery network (PDN) unstable, leading to design failures. While traditional stability measures such as phase margin are not applicable to regulated PDNs that have a large number of loops, a brute-force analysis of network stability can be impractical due to the high complexity of a given PDN. We present a hybrid stability margin concept and the associated stability-checking method for PDNs with integrated linear low-dropout voltage regulators (LDOs). With theoretical rigor, the proposed approach is local in the sense that the stability of the entire network can be efficiently examined through a hybrid stability constraint that is defined locally for individual LDOs. In the same spirit, we propose a localized LDO design methodology that optimizes individual LDOs in a stand-alone manner while ensuring the network-level stability. Key circuit-level design considerations and tradeoffs involved in stability-ensuring LDO design are also discussed.
Suming Lai, Boyuan Yan, Peng Li 0001
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.2
2012 Stability assurance and design optimization of large power delivery networks with multiple on-chip voltage regulators
abstract
Distributive on-chip voltage regulation is appealing to solving the power integrity problems in nowadays high-end SoCs. Nevertheless, ensuring the stability of large-scale power delivery networks regulated by a multiplicity of voltage regulators is challenging due to the size of the system and complex interactions between the regulators and the large loading network. We present a theoretically elegant framework that provides a rigorous guarantee for network stability. We further develop a practical design approach that largely decouples the design of linear voltage regulators from that of the complex load, making it feasible to ensure the stability of the complete network. The presented design approach has been successfully applied to several design examples with guaranteed stability and competitive performances.
Suming Lai, Boyuan Yan, Peng Li 0001
ICCAD2
2012 Linking brain behavior to underlying cellular mechanisms via large-scale brain modeling and simulation
Yong Zhang 0049, Boyuan Yan, Mingchao Wang, Jingzhen Hu, Haokai Lu, Peng Li 0001
Neurocomputing2
2012 Decentralized and Passive Model Order Reduction of Linear Networks With Massive Ports
abstract
It is well known that model order reduction for circuits with many terminals remains a challenging problem. One reason is that existing approaches are based on a centralized framework, in which each input-output pair is implicitly assumed to be equally interacted and the matrix-valued transfer function is assumed to be fully populated. In this paper, we attempt to address this long-standing problem using a decentralized model order reduction scheme, in which a multi-input multi-output system is decoupled into a number of subsystems and each subsystem corresponds to one output and several dominant inputs. The decoupling process is based on the relative gain array, which measures the degree of interaction of each input-output pair. For each decoupled subsystem, passive reduction can be easily achieved using existing reduction techniques. The proposed method is suitable for resistance-dominant interconnects such as on-chip power grids, substrate planes where extremely compact models can be obtained. Simulation results demonstrate the advantage of the proposed method compared to the existing approaches.
Boyuan Yan, Sheldon X.-D. Tan, Lingfei Zhou, Jie Chen 0005, Ruijing Shen
IEEE Trans. Very Large Scale Integr. Syst.1
2011 Decoupling for power gating: sources of power noise and design strategies
abstract
Power gating is essential for controlling leakage power dissipation of modern chip designs. However, power gating introduces unique power delivery integrity issues and tradeoffs between switching and rush current (wake-up) supply noises. In addition, in power-gated power delivery networks (PDNs), the amount of power saving intrinsically trades off with power integrity. In this paper, we propose systemic decoupling capacitance optimization strategies that optimally balance between switching and rush current noises, and tradeoff between power integrity and wake-up time, hence power saving. Furthermore, we propose a novel re-routable decoupling capacitance concept to break the tight interaction between power integrity and power saving, providing further improved tradeoffs between the two. Our design strategies have been implemented in a simulation-based optimization flow and the conducted experimental results have demonstrated significant improvement on leakage power saving through the presented techniques.
Tong Xu 0004, Peng Li 0001, Boyuan Yan
DAC3
2011 Simulation of large neuronal networks with biophysically accurate models on graphics processors
abstract
Efficient simulation of large-scale mammalian brain models provides a crucial computational means for understanding complex brain functions and neuronal dynamics. However, such tasks are hindered by significant computational complexities. In this work, we attempt to address the significant computational challenge in simulating large-scale neural networks based on biophysically plausible Hodgkin-Huxley (HH) neuron models. Unlike simpler phenomenological spiking models, the use of HH models allows one to directly associate the observed network dynamics with the underlying biological and physiological causes, but at a significantly higher computational cost. We exploit recent commodity massively parallel graphics processors (GPUs) to alleviate the significant computational cost in HH model based neural network simulation. We develop look-up table based HH model evaluation and efficient parallel implementation strategies geared towards higher arithmetic intensity and minimum thread divergence. Furthermore, we adopt and develop advanced multi-level numerical integration techniques well suited for intricate dynamical and stability characteristics of HH models. On a commodity GPU card with 240 streaming processors, for a neural network with one million neurons and 200 million synaptic connections, the presented GPU neural network simulator is about 600X faster than a basic serial CPU based simulator, 28X faster than the CPU implementation of the proposed techniques, and only two to three times slower than the GPU based simulation using simpler phenomenological spiking models.
Mingchao Wang, Boyuan Yan, Jingzhen Hu, Peng Li 0001
IJCNN2
2010 Efficient model reduction of interconnects via double gramians approximation
abstract
The gramian approximation methods have been proposed recently to overcome the high computing costs of classical balanced truncation based reduction methods. But those methods typically gain efficiency by projecting the original system only onto one dominant subspace of the approximate system gramian (for instance using only controllability gramian). This single gramian reduction method can lead to large errors as the subspaces of controllability and observability can be quite different for general interconnects with unsymmetric system matrices. In this paper, we propose a fast balanced truncation method where the system is balanced in terms of two approximate gramians as achieved in the classical balanced truncation method. The novelty of the new method is that we can keep the similar computing costs of the single gramian method. The proposed algorithm is based on a generalized SVD-based balancing scheme such that the dominant subspace of the approximate gramian product can be obtained in a very efficient way without explicitly forming the gramians. Experimental results on a number of published benchmarks show that the proposed method is much more accurate than the single gramian method with similar computing costs.
Boyuan Yan, Sheldon X.-D. Tan, Gengsheng Chen, Yici Cai
ASP-DAC1
2009 Multiple block structure-preserving reduced order modeling of interconnect circuits
Ning Mi, Sheldon X.-D. Tan, Boyuan Yan
Integr.3
2008 DeMOR: decentralized model order reduction of linear networks with massive ports
abstract
Model order reduction is an efficient technique to reduce the system complexity while producing a good approximation of the input-output behavior. However, the efficiency of reduction degrades as the number of ports increases, which remains a long-standing problem. The reason for the degradation is that existing approaches are based on a centralized framework, where each input-output pair is implicitly assumed to be equally interacted and the matrix-valued transfer function has to be assumed to be fully populated. In this paper, a decentralized model order reduction scheme is proposed, where a multi-input multi-output (MIMO) system is decoupled into a number of subsystems and each subsystem corresponds to one output and several dominant inputs. The decoupling process is based on the relative gain array (RGA), which measures the degree of interaction of each input-output pair. Our experimental results on a number of interconnect circuits show that most of the input-output interactions are usually insignificant, which can lead to extremely compact models even for systems with massive ports. The reduction scheme is very amenable for parallel computing as each decoupled subsystem can be reduced independently.
Boyuan Yan, Lingfei Zhou, Sheldon X.-D. Tan, Jie Chen 0005, Bruce McGaughy
DAC1
2008 Modeling and simulation for on-chip power grid networks by locally dominant Krylov subspace method
abstract
Fast analysis of power grid networks has been a challenging problem for many years. The huge size renders circuit simulation inefficient and the large number of inputs further limits the application of existing Krylov-subspace macromodeling algorithms. However, strong locality has been observed that two nodes geometrically far have very small electrical impact on each other because of the exponential attenuation. However, no systematic approaches have been proposed to exploit such locality. In this paper, we propose a novel modeling and simulation scheme, which can automatically identify the dominant inputs for a given observed node in a power grid network. This enables us to build extremely compact models by projecting the system onto the locally dominant Krylov subspace corresponding to those dominant inputs only. The resulting simulation can be very fast with the compact models if we only need to view the responses of a few nodes under many different inputs. Experimental results show that the proposed method can have at least 100X speedup over SPICE-like simulations on a number of large power grid networks up to 1M nodes.
Boyuan Yan, Sheldon X.-D. Tan, Gengsheng Chen, Lifeng Wu 0002
ICCAD1
2008 An efficient terminal and model order reduction algorithm
Pu Liu, Sheldon X.-D. Tan, Boyuan Yan, Bruce McGaughy
Integr.3
2007 Passive Interconnect Macromodeling Via Balanced Truncation of Linear Systems in Descriptor Form
abstract
In this paper, we present a novel passive model order reduction (MOR) method via projection-based truncated balanced realization method, PriTBR, for large RLC interconnect circuits. Different from existing passive truncated balanced realization (TBR) methods where numerically expensive Lur'e or algebraic Riccati (ARE's) equations are solved, the new method performs balanced truncation on linear system in descriptor form by solving generalized Lyapunov equations. Passivity preservation is achieved by congruence transformation instead of simple truncations. For the first time, passive model order reduction is achieved by combining Lyapunov equation based TBR method with congruence transformation. Compared with existing passive TBR, the new technique has the same accuracy and is numerically reliable, less expensive. In addition to passivity-preserving, it can be easily extended to preserve structure information inherent to RLC circuits, like block structure, reciprocity and sparsity. PriTBR can be applied as a second MOR stage combined with Krylov-subspace methods to generate a nearly optimal reduced model from a large scale interconnect circuit while passivity, structure, and reciprocity are preserved at the same time. Experimental results demonstrate the effectiveness of the proposed method and show PriTBR and its structure-preserving version, SP-PriTBR, are superior to existing passive TBR and Krylov-subspace based moment-matching methods.
Boyuan Yan, Sheldon X.-D. Tan, Pu Liu, Bruce McGaughy
ASP-DAC1
2007 SBPOR: Second-Order Balanced Truncation for Passive Order Reduction of RLC Circuits
abstract
RLC circuits have been shown to be better formulated as second-order systems instead of first-order systems. The corresponding model order reduction techniques for second- order systems have been developed. However, existing techniques are mainly based on moment-matching concept. While suitable for the reduction of large-scale circuits, those approaches cannot generate reduced models as compact as desired. To achieve smaller models with better error control, a novel technique, SBPOR (Second-order Balanced truncation for Passive Order Reduction), is proposed in this paper, which is the first second-order balanced truncation method proposed for passive reduction of RLC circuits. SBPOR is superior to the pioneering work in the control community because second-order systems can be balanced via congruency transformation without any accuracy loss. In addition, compared with the first-order balanced truncation approaches, SBPOR is a better choice for RLC reduction. SBPOR preserves not only passivity but also the structure information inherent to RLC circuits, which is a special need for RLC reduction. In addition, SBPOR is computationally more efficient as it only needs to solve one linear matrix equation instead of two quadratic matrix equations.
Boyuan Yan, Sheldon X.-D. Tan, Pu Liu, Bruce McGaughy
DAC1