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Chit-Kwan Lin

dblp:39/7552 · DBLP profile ↗
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5ranked-venue papers
3as first author
0since 2021 · last 2019
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Computer networks · 2 · 1 first-authorSoftware engineering, systems software and programming languages · 2 · 1 first-authorSystems, architecture and hardware · 1Applied, interdisciplinary, general and emerging computing · 1 · 1 first-author

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
2 papers
Emerging computing paradigms · 40% Processor architecture and microarchitecture · 20% Parallel and multicore computing · 20%
Software engineering, system software, and programming languages
1 paper
Compilers and program optimization · 100%

Topics — the 7 heaviest of 9, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Processor architecture and microarchitecture › adaptive architecture
adaptive microarchitecture
0.412019
Post-silicon CPU adaptation made practical using machine learning · ISCA 2019
Parallel and multicore computing
workload adaptation
0.412019
Post-silicon CPU adaptation made practical using machine learning · ISCA 2019
Emerging computing paradigms
neuromorphic computing
0.312018
Mapping spiking neural networks onto a manycore neuromorphic architecture · PLDI 2018
Emerging computing paradigms › neuromorphic computing
spiking neural network mapping
0.312018
Mapping spiking neural networks onto a manycore neuromorphic architecture · PLDI 2018
Compilers and program optimization
deep learning compiler
0.112018
Mapping spiking neural networks onto a manycore neuromorphic architecture · PLDI 2018
Emerging computing paradigms
neuromorphic hardware
0.112018
Mapping spiking neural networks onto a manycore neuromorphic architecture · PLDI 2018
Wireless sensing and localization
ranging
0.012009
Localization with snap-inducing shaped residuals (SISR): coping with errors in measurement · MobiCom 2009

Methods — techniques the papers use, named apart from their topics

greedy algorithm · 0.7machine learning · 0.4robust statistics · 0.1nonlinear least squares · 0.1
YearPublicationVenuePosition
2019 Post-silicon CPU adaptation made practical using machine learning
abstract
Processors that adapt architecture to workloads at runtime promise compelling performance per watt (PPW) gains, offering one way to mitigate diminishing returns from pipeline scaling. State-of-the-art adaptive CPUs deploy machine learning (ML) models on-chip to optimize hardware by recognizing workload patterns in event counter data. However, despite breakthrough PPW gains, such designs are not yet widely adopted due to the potential for systematic adaptation errors in the field.
Stephen J. Tarsa, Rangeen Basu Roy Chowdhury, Julien Sebot, Gautham N. Chinya, Jayesh Gaur, Karthik Sankaranarayanan, Chit-Kwan Lin, Robert Chappell, Ronak Singhal
ISCA7
2018 Mapping spiking neural networks onto a manycore neuromorphic architecture
abstract
We present a compiler for Loihi, a novel manycore neuromorphic processor that features a programmable, on-chip learning engine for training and executing spiking neural networks (SNNs). An SNN is distinguished from other neural networks in that (1) its independent computing units, or "neurons", communicate with others only through spike messages; and (2) each neuron evaluates local learning rules, which are functions of spike arrival and departure timings, to modify its local state. The collective neuronal state dynamics of an SNN form a nonlinear dynamical system that can be cast as an unconventional model of computation. To realize such an SNN on Loihi requires each constituent neuron to locally store and independently update its own spike timing information. However, each Loihi core has limited resources for this purpose and these must be shared by neurons assigned to the same core. In this work, we present a compiler for Loihi that maps the neurons of an SNN onto and across Loihi's cores efficiently. We show that a poor neuron-to-core mapping can incur significant energy costs and address this with a greedy algorithm that compiles SNNs onto Loihi in a power-efficient manner. In so doing, we highlight the need for further development of compilers for this new, emerging class of architectures.
Chit-Kwan Lin, Andreas Wild, Gautham N. Chinya, Tsung-Han Lin, Mike Davies 0002
PLDI1
2011 Achieving High Throughput Ground-to-UAV Transport via Parallel Links
abstract
Wireless data transfer under high mobility, as found in unmanned aerial vehicle (UAV) applications, is a challenge due to varying channel quality and extended link outages. We present FlowCode, an easily deployable link-layer solution utilizing multiple transmitters and receivers for the purpose of supporting existing transport protocols such as TCP in these scenarios. By using multiple transmitters and receivers and by exploiting the resulting antenna beam diversity and parallel transmission effects, FlowCode increases throughput and reception range. In emulation, we show that TCP over FlowCode gives greater goodput over a larger portion of the flight path, compared to an enhanced TCP protocol using the standard 802.11 MAC. In the process, we make a strong case for using trace-modulated emulation when developing distributed protocols for complex wireless environments.
Chit-Kwan Lin, H. T. Kung 0001, Tsung-Han Lin, Stephen J. Tarsa, Dario Vlah
ICCCN1
2009 Localization with snap-inducing shaped residuals (SISR): coping with errors in measurement
abstract
We consider the problem of localizing wireless nodes in an outdoor, open-space environment, using ad-hoc radio ranging measurements, e.g., 802.11. We cast these ranging measurements as a set of distance constraints, thus forming an over-determined system of equations suitable for non-linear least squares optimization. However, ranging measurements are often subject to errors, induced by multipath signals and variations in path loss, unreliable hardware or antenna connectors, or imperfection in measurement models. Such potentially large, non-Gaussian errors in the measurement data ultimately produce inaccurate localization solutions. We propose a new error-tolerant localization method, called snap-inducing shaped residuals (SISR), to identify automatically "bad nodes" and "bad links" arising from these errors, so that they receive less weight in the localization process. In particular, SISR snaps "good nodes" to their accurate locations and gives less emphasis to other nodes. While the mathematical techniques used by SISR are similar to robust statistics, SISR's exploitation of the snap-in effect in localization appears to be novel. We provide analysis on the principle of SISR, illustrate errors in real-world measurements, and demonstrate a working SISR implementation in field experiments on a testbed of 37 wireless nodes, as well as show the superior performance of SISR in simulation with a larger number of nodes.
H. T. Kung 0001, Chit-Kwan Lin, Tsung-Han Lin, Dario Vlah
MobiCom2
2000 Online Prescription Renewals: A Web-based Solution to Streamlining Hospital Workflow and Improving Patient Services
Chit-Kwan Lin, Ju Han Kim, Patricia M. Russell, David M. Rind
AMIA1