Benchmarking warehouse-scale compute (WSC) systems poses unique challenges due to their scale, workload diversity, and focus on data-intensive computation. Traditional benchmarks often fall short in capturing the nuances of WSC behavior. Creating a public benchmark suite that is representative of the workloads used by actual warehouse-scale computers is challenging, as they typically run proprietary, non-public software that operates on confidential data. In this paper, we present Fleetbench, a benchmark suite that is representative of the workloads used at Google. Fleetbench does not benchmark entire applications; rather, it focuses on common building blocks, known as the “datacenter tax”, that are at the core of a wide range of different data center applications, and many of which are open source. The relevant building blocks are selected based on fleet-wide profiling data. Representative input data is collected using a fleet-wide value profiler, ensuring that no confidential information is revealed. Fleetbench is available as open source on Github21https://github.com/google/fieetbench.

Modern C++ server workloads rely on 2 MB huge pages to improve memory system performance via higher TLB hit rates. Huge pages have traditionally been supported at the kernel level, but recent work has shown that user-level, huge page-aware memory allocators can achieve higher huge page coverage and thus performance. These memory allocators deal with a trade-off: 1) allocate memory from the operating system (OS) at the granularity of a huge page, achieve high performance, but potentially waste memory due to fragmentation, or 2) limit fragmentation by breaking up huge pages into smaller 4 KB pages and returning them to the OS, but reduce performance due to lower huge page coverage. For example, the state-of-the-art TCMalloc allocator handles this trade-off by releasing memory to the OS at a configurable release rate, breaking up huge pages as necessary.