Demo Data from VLDB 2026 / reviewers in the wild / expert
Aurora Tomás
dblp:392/3378
· DBLP profile ↗
1ranked-venue papers
1as first author
1since 2021 · last 2024
—ORCID · none
Domains — the database's venue-derived domains; a paper can count in several
Systems, architecture and hardware · 1 · 1 first-author · 1 since 2021
Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.
| Computer architecture, parallel and distributed computing, and storage systems
1 paper |
GPUs and heterogeneous computing · 39% Memory systems · 30% Parallel and multicore computing · 30% |
Topics — the 3 heaviest of 4, each with the papers that count most for it
| Topic | Weight | Papers | Last | Evidence papers |
|---|---|---|---|---|
GPUs and heterogeneous computing
GPU architecture |
0.8 | 1 | 2024 | LIBRA: Memory Bandwidth- and Locality-Aware Parallel Tile Rendering · MICRO 2024 |
Parallel and multicore computing › parallel scheduling
locality-aware scheduling |
0.8 | 1 | 2024 | LIBRA: Memory Bandwidth- and Locality-Aware Parallel Tile Rendering · MICRO 2024 |
Memory systems
memory bandwidth management |
0.8 | 1 | 2024 | LIBRA: Memory Bandwidth- and Locality-Aware Parallel Tile Rendering · MICRO 2024 |
Methods — techniques the papers use, named apart from their topics
simulation · 0.8frame-to-frame coherence prediction · 0.8
| Year | Publication | Venue | Position |
|---|---|---|---|
| 2024 | LIBRA: Memory Bandwidth- and Locality-Aware Parallel Tile RenderingabstractThe increasing demand for high-quality graphics requires a significant increase in computational power of modern GPUs. The common approach to follow is augmenting the number of compute units (i.e., shader cores). However, this can result in underutilized resources if the workload is not properly balanced. This is particularly challenging in Tile-Based Rendering (TBR) GPUs, the predominant architecture in mobile GPUs, running graphics applications due to limited per-tile workload. This work proposes parallel tile rendering to efficiently in-crease the computational capabilities of TBR GPUs. This solves the problem of not having enough work to utilize the additional compute units but causes memory-intensive applications to underperform due to the increased memory pressure. To this end, we introduce LIBRA, a parallel tile rendering architecture that includes a novel locality-aware approach to schedule tiles to Raster Units to evenly distribute memory requests during the rendering of each frame. This alleviates memory congestion, therefore, reducing memory access time. LIBRA leverages frame-to-frame coherence to predict the memory pressure of each tile of a frame without penalizing the hit ratio of the cache memories. Evaluations over a wide range of commercial gaming applications show that LIBRA reduces the average memory latency by 13.5% and achieves an average speedup of 20.9%. It also provides an 11.4% improvement in throughput (frames per second) and a total GPU energy reduction of 9.2%, while adding negligible overhead. Aurora Tomás, Juan L. Aragón, Joan-Manuel Parcerisa, Antonio González 0001 |
MICRO | 1 |