Jiezhong Wu

dblp:392/3662 · DBLP profile ↗
← Back
3ranked-venue papers
2as first author
3since 2021 · last 2026
0009-0001-6457-5108ORCID · reported

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 2 · 1 first-author · 2 since 2021Artificial intelligence and machine learning · 1 · 1 first-author · 1 since 2021Graphics, computer vision, multimedia, augmented reality and games · 1 · 1 first-author · 1 since 2021

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Artificial intelligence
1 paper
Deep learning architectures and training · 87% Generative modeling · 13%
Interdisciplinary, comprehensive, and emerging computing
1 paper
Computational science and engineering · 100%

Topics — the 4 heaviest of 4, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Machine learning › Deep learning architectures and training › sequence modeling
continuous-time sequence modeling
1.012026
SELDON: Supernova Explosions Learned by Deep ODE Networks · AAAI 2026
Machine learning › Deep learning architectures and training › neural differential equations
neural ordinary differential equations
1.012026
SELDON: Supernova Explosions Learned by Deep ODE Networks · AAAI 2026
Computational science and engineering › astronomy
astrophysics
1.012026
SELDON: Supernova Explosions Learned by Deep ODE Networks · AAAI 2026
Machine learning › Generative modeling
variational autoencoder
0.312026
SELDON: Supernova Explosions Learned by Deep ODE Networks · AAAI 2026

Methods — techniques the papers use, named apart from their topics

masked GRU-ODE · 2.0gaussian basis decoder · 2.0deep sets · 2.0
YearPublicationVenuePosition
2026 SELDON: Supernova Explosions Learned by Deep ODE Networks
abstract
The discovery rate of optical transients will explode to 10 million public alerts per night once the Vera C. Rubin Observatory’s Legacy Survey of Space and Time comes online, overwhelming the traditional physics-based inference pipelines. A continuous-time forecasting AI model is of interest because it can deliver millisecond-scale inference for thousands of objects per day, whereas legacy MCMC codes need hours per object. In this paper, we propose SELDON, a new continuous-time variational autoencoder for panels of sparse and irregularly time-sampled (gappy) astrophysical light curves that are nonstationary, heteroscedastic, and inherently dependent. SELDON combines a masked GRU-ODE encoder with a latent neural ODE propagator and an interpretable Gaussian-basis decoder. The encoder learns to summarize panels of imbalanced and correlated data even when only a handful of points are observed. The neural ODE then integrates this hidden state forward in continuous time, extrapolating to future unseen epochs. This extrapolated time series is further encoded by deep sets to a latent distribution that is decoded to a weighted sum of Gaussian basis functions, the parameters of which are physically meaningful. Such parameters (e.g., rise time, decay rate, peak flux) directly drive downstream prioritization of spectroscopic follow-up for astrophysical surveys. Beyond astronomy, the architecture of SELDON offers a generic recipe for interpretable and continuous-time sequence modeling in any time domain where data are multivariate, sparse, heteroscedastic, and irregularly spaced.
Jiezhong Wu, Jack O'Brien, Jennifer Li, M. S. Krafczyk, Ved G. Shah, Amanda Wasserman, Daniel W. Apley, Gautham Narayan, Noelle I. Samia
AAAI1
2025 Timing-Verification Test Generation Targeting Small Delay Defects
abstract
Recent studies of silent data errors (SDEs) in mega-scale datacenters indicate that SDEs are caused by small delay defects that escaped detection by manufacturing tests or occurred during the lifetime of the system. A small delay defect is detected by a test that propagates a transition through one of the longest paths that includes the defect site. Once the path is selected, for every gate or cell on the path, ATPG assigns off-path input values to enable the propagation of a transition through the path. For complex gates, such as AOI and XOR, there are multiple sets of possible assignments (or input stimuli) that the ATPG can use, with substantially different propagation delays. Existing test generation procedures do not consider these differences in propagation delays once a path is selected. We propose a new approach to ATPG for small delay defects, called Timing Verification Test or TVT, that selects the off-path input values to maximize the delay of the path. The tests produced by TVT result in path delays that are significantly higher than those obtained when off-path input values are selected arbitrarily by the ATPG if they are not mandated by the propagation conditions. TVT also considers different PVT corners that affect the selection of the longest paths. Experimental results for an industrial core show that TVT increases the path delays by up to 15.91% for a set of the longest paths needed to detect small cell-aware delay faults at different PVT corners.
Jiezhong Wu, Nilanjan Mukherjee 0001, Irith Pomeranz, Kun-Han Tsai, Janusz Rajski
VTS1
2024 Delay Monitoring Under Different PVT Corners for Test and Functional Operation
abstract
The adverse effects of silent data errors (SDEs) on the operation of large data centers have been reported recently by hyper-scalar companies. SDEs tend to be elusive and are difficult to detect until they affect a particular application after the IC has been deployed in-field. Although the cause of SDEs ranges from manufacturing test escapes and design marginalities to design bugs, experimental data from the industry largely indicate that SDEs can be traced back to timing related issues that become more severe with aging and depend on the operating conditions of process, voltage and temperature (PVT). This paper describes a complete framework for monitoring the timing related issues under different operating conditions for test and functional operation. The framework has three components. The first component is a procedure for the identification of the longest paths that are prone to delay failures under different PVT corners. The second component is a programmable slack monitor design that monitors the changes in path delays within a detection window, and produces an alarm when a path is close to failure, with proximity to failure being a programmable feature. The third component is a procedure that determines the placement of the monitors in the design. Experimental results for an industrial design demonstrate the trade-offs related to the placement of monitors and the scenarios under which the monitors raise alarms.
Hari Addepalli, Jiezhong Wu, Nilanjan Mukherjee 0001, Irith Pomeranz, Janusz Rajski
ITC2