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Mohammad Hosseininia

dblp:392/6220 · DBLP profile ↗
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1ranked-venue papers
1as first author
1since 2021 · last 2024
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 1 · 1 first-author · 1 since 2021

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
1 paper
Embedded and real-time systems · 46% Memory systems · 46% Hardware reliability and fault tolerance · 7%

Topics — the 5 heaviest of 5, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Memory systems › cache › cache organization
approximate cache
0.812024
TVTAC: Triple Voltage Threshold Approximate Cache for Energy Harvesting Nonvolatile Processors · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2024
Memory systems
cache design
0.812024
TVTAC: Triple Voltage Threshold Approximate Cache for Energy Harvesting Nonvolatile Processors · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2024
Embedded and real-time systems
energy harvesting systems
0.812024
TVTAC: Triple Voltage Threshold Approximate Cache for Energy Harvesting Nonvolatile Processors · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2024
Embedded and real-time systems › energy harvesting systems
nonvolatile processor
0.812024
TVTAC: Triple Voltage Threshold Approximate Cache for Energy Harvesting Nonvolatile Processors · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2024
Hardware reliability and fault tolerance
power failure resilience
0.212024
TVTAC: Triple Voltage Threshold Approximate Cache for Energy Harvesting Nonvolatile Processors · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2024

Methods — techniques the papers use, named apart from their topics

voltage threshold scaling · 0.8approximation control · 0.8
YearPublicationVenuePosition
2024 TVTAC: Triple Voltage Threshold Approximate Cache for Energy Harvesting Nonvolatile Processors
abstract
Energy harvesting is considered to be a substitute for batteries in many modern systems. Systems based on energy harvesting receive environmental energies from sources such as sun, radio frequency, wind, vibration, etc, and convert them to electrical energy to be used by the capacitor of the system or feed the CPS system directly. Despite its advantages, energy harvesting comes with some limitations, such as the instability of the received energy, which means that the energy may not be received for a moment due to environmental conditions during energy harvesting. Therefore, due to not receiving enough energy, the system function may face problems, which can lead to system shutdown and data loss. To prevent program execution interruption caused by frequent power interruptions in systems based on energy harvesting, these systems use NVP. Saving the state in the NVP is done through non-volatile registers and memories that can hold the contents until the power is restored. However, systems based on energy harvesting and NVPs also have challenges such as frequent backups’ energy consumption, slow program forward progress, and loss of data. In this paper, we propose TVTAC, a framework for energy harvesting-based NVP CPS systems. TVTAC modifies conventional NVP’s cache architecture to efficiently work with newly introduced operational mode to prevent unnecessary backup operations. Furthermore, TVTAC is equipped with an NVP’s specific approximation unit that controls the approximation knobs during the approximate data cache accesses in order to save more energy. The simulation results show that TVTAC improves forward progress by 28% in the best case and 12% on average, compared to similar methods. From an energy consumption perspective, TVTAC reduces energy consumption by 43.5% in the best case and 28.5% on average.
Mohammad Hosseininia, Arash Salahvarzi, Amir Mahdi Hosseini Monazzah
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.1