VLDB 2026 Research / reviewers in the wild / expert
Elham Rahman
dblp:393/5882
· DBLP profile ↗
1ranked-venue papers
0as first author
1since 2021 · last 2025
—ORCID · none
Domains — the database's venue-derived domains; a paper can count in several
Systems, architecture and hardware · 1 · 1 since 2021
Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.
| Computer architecture, parallel and distributed computing, and storage systems
1 paper |
Integrated circuit design · 100% |
Topics — the 3 heaviest of 3, each with the papers that count most for it
| Topic | Weight | Papers | Last | Evidence papers |
|---|---|---|---|---|
Integrated circuit design
digital arithmetic circuits |
0.9 | 1 | 2025 | Balanced Modular Addition for the Moduli Set $ \{2^{q},2^{q}\mp 1,2^{2q}+1\}${2q,2q∓1,22q+1} via Moduli-($ 2^{q}\mp \sqrt{-1}$2q∓-1) Adders · IEEE Trans. Computers 2025 |
Integrated circuit design
residue number system arithmetic |
0.9 | 1 | 2025 | Balanced Modular Addition for the Moduli Set $ \{2^{q},2^{q}\mp 1,2^{2q}+1\}${2q,2q∓1,22q+1} via Moduli-($ 2^{q}\mp \sqrt{-1}$2q∓-1) Adders · IEEE Trans. Computers 2025 |
Integrated circuit design › digital circuit design › arithmetic circuit design
adder design |
0.3 | 1 | 2025 | Balanced Modular Addition for the Moduli Set $ \{2^{q},2^{q}\mp 1,2^{2q}+1\}${2q,2q∓1,22q+1} via Moduli-($ 2^{q}\mp \sqrt{-1}$2q∓-1) Adders · IEEE Trans. Computers 2025 |
Methods — techniques the papers use, named apart from their topics
synthesis · 0.9analytical evaluation · 0.9New-CRT · 0.9
| Year | Publication | Venue | Position |
|---|---|---|---|
| 2025 | Balanced Modular Addition for the Moduli Set $ \{2^{q},2^{q}\mp 1,2^{2q}+1\}${2q,2q∓1,22q+1} via Moduli-($ 2^{q}\mp \sqrt{-1}$2q∓-1) AddersabstractModuli-set$ \mathbf{\tau}=\{2^{\boldsymbol{q}},2^{\boldsymbol{q}}\pm 1\}$is often the base of choice for realization of digital computations via residue number systems. The optimum arithmetic performance in parallel residue channels, is generally achieved via equal bit-width residues (e.g.,$ \boldsymbol{q}~ \mathbf{i}\mathbf{n}~ \mathbf{\tau}$) that usually leads to equal computation speed within all the residue channels. However, the commonly difficult and costly task of reverse conversion (RC) is often eased in the existence of conjugate moduli. For example,$ 2^{\boldsymbol{q}}\mp 1\in \mathbf{\tau}$, lead to the efficient modulo-($ 2^{2\boldsymbol{q}}-1$) addition, as the bulk of$ \mathbf{\tau}$-RC, via the New-CRT reverse conversion method. Nevertheless, for additional dynamic range,$ \mathbf{\tau}$is augmented with other moduli. In particular,$ \mathbf{\phi}=\mathbf{\tau}\cup \{2^{2\boldsymbol{q}}+1\}$, leads to efficient RC, where the added modulo is conjugate with the product$ 2^{2\boldsymbol{q}}-1$of$ 2^{\boldsymbol{q}}\mp 1\in \mathbf{\tau}$. Therefore, the final step of$ \mathbf{\phi}$-RC would be fast and low cost/power modulo-($ 2^{4\boldsymbol{q}}-1$) addition. However, the$ 2\boldsymbol{q}$-bit channel-width jeopardizes the existing delay-balance in$ \mathbf{\tau}$. As a remedial solution, given that$ 2^{2\boldsymbol{q}}+1=\left(2^{\boldsymbol{q}}-\boldsymbol{j}\right)\left(2^{\boldsymbol{q}}+\boldsymbol{j}\right)$, with$ \boldsymbol{j}=\sqrt{-1}$, we design and implement modulo-($ 2^{2\boldsymbol{q}}+1$) adders via two parallel$ \boldsymbol{q}$-bit moduli-($ 2^{\boldsymbol{q}}\mp \boldsymbol{j}$) adders. The analytical and synthesis based evaluations of the proposed modulo-($ 2^{\boldsymbol{q}}\mp \boldsymbol{j}$) adders show that the delay-balance of$ \mathbf{\tau}$is preserved with no cost overhead vs.$ \mathbf{\phi}$. In particular, the binary-to-complex and complex-to-binary convertors are merely cost-free and immediate. Ghassem Jaberipur, Elham Rahman, Jeong-A Lee |
IEEE Trans. Computers | 2 |