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Hyojun Yun

dblp:394/6420 · DBLP profile ↗
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1ranked-venue papers
0as first author
1since 2021 · last 2025
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 1 · 1 since 2021

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
1 paper
Hardware reliability and fault tolerance · 56% Memory systems · 44%

Topics — the 3 heaviest of 3, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Memory systems
DRAM
0.912025
PETRA: Powerful Early Termination-Based Redundancy Analysis · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2025
Hardware reliability and fault tolerance
memory repair
0.912025
PETRA: Powerful Early Termination-Based Redundancy Analysis · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2025
Hardware reliability and fault tolerance
memory yield enhancement
0.312025
PETRA: Powerful Early Termination-Based Redundancy Analysis · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2025

Methods — techniques the papers use, named apart from their topics

fault grouping · 0.9early termination · 0.9
YearPublicationVenuePosition
2025 PETRA: Powerful Early Termination-Based Redundancy Analysis
abstract
In dynamic random-access memory (DRAM), memory redundancy analysis (RA) is a crucial process for enhancing memory yield and reducing production costs. It finds a memory repair solution by efficiently allocating the limited number of spare cell lines that replace a faulty cell. However, it is challenging to quickly find a memory repair solution because RA is an NP-complete problem. To address this issue more effectively, we present a powerful early termination-based high-speed RA method. This method rapidly assesses memory repairability, terminating the RA process early in cases where repair is impossible, or a solution can be easily found. Additionally, by dividing faulty cells into several groups, the proposed RA method finds fast and approximate albeit nonoptimal solution sets for each group. This facilitates the rapid acquisition of a memory repair solution without the need to search for all the optimal solution sets. These features enable RA to be promptly executed while ensuring the repair solution for any repairable memory. Experimental results demonstrate that the proposed RA method can find a repair solution faster than the existing RA methods.
Youngkwang Lee, Hyojun Yun, Younwoo Yoo, Sungho Kang 0001
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.2