VLDB 2026 Research / reviewers in the wild / expert
Chengkang Huang
dblp:396/2320
· DBLP profile ↗
6ranked-venue papers
3as first author
6since 2021 · last 2026
0009-0007-3045-4563ORCID · reported
Domains — the database's venue-derived domains; a paper can count in several
Systems, architecture and hardware · 2 · 1 first-author · 2 since 2021Graphics, computer vision, multimedia, augmented reality and games · 2 · 2 first-author · 2 since 2021Computer networks · 1 · 1 since 2021Applied, interdisciplinary, general and emerging computing · 1 · 1 since 2021
Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.
| Computer networks
1 paper |
Network measurement and analytics · 100% | |
| Computer architecture, parallel and distributed computing, and storage systems
1 paper |
High-performance computing · 100% |
Topics — the 2 heaviest of 2, each with the papers that count most for it
| Topic | Weight | Papers | Last | Evidence papers |
|---|---|---|---|---|
Network measurement and analytics
anomaly detection |
0.9 | 1 | 2025 | Hardware-Accelerated Flow Interaction Graph Compression for High-Speed Anomaly Detection · INFOCOM 2025 |
High-performance computing
graph compression |
0.9 | 1 | 2025 | Hardware-Accelerated Flow Interaction Graph Compression for High-Speed Anomaly Detection · INFOCOM 2025 |
Methods — techniques the papers use, named apart from their topics
hardware acceleration · 1.7
| Year | Publication | Venue | Position |
|---|---|---|---|
| 2026 | An Area-latency-balanced Hardware Design for the Reference Pixel Management of VVC Intra Coding
Chengkang Huang, Leilei Huang, Taoyu Zhang, Shuocheng Wang, Yibo Fan |
ISCAS | 1 |
| 2026 | A 77.9%-Cycle-Reduced Bubble-Removing Strategy for Hardware RDO Supporting QTMTT in VVCabstractThe introduction of the Versatile Video Coding (VVC) standard is dedicated to meeting the increasing demand for high-resolution and high-quality video. However, the novel partitioning method named Quad-Tree Plus Multi-Type Tree (QTMTT) significantly increases computational complexity and data dependency, resulting in more pipeline bubbles, lower hardware efficiency, and degraded throughput. To address this issue, we analyze the hardware data dependencies, categorize four different types of pipeline bubbles, and propose a bubble-removing strategy for the Rate Distortion Optimization (RDO) module with MTT depth of 1. To be more specific, we first propose an efficient partition scheduling scheme based on the characteristics of QTMTT partitions. Then we redesign the transpose memory used in 2D transformation to efficiently handle the blocks of different sizes introduced by QTMTT. These two strategies achieve a 42.3% reduction in hardware cycles. In addition, for I frames, we further propose a hardware-oriented partition pruning algorithm that can co-operate with the proposed architecture, achieving a 42.3%~77.9% reduction in hardware cycles with only 0%~1.21% BD-Rate loss compared to the VTM-23.4. The proposed hardware architecture is implemented in GF 28nm technology, supporting up to 4K@40fps throughput at 500MHz with a hardware cost of only 3259 K gates and 63.47 KB on-chip memory, demonstrating competitive compression performance, high hardware efficiency, and outstanding throughput. Chengkang Huang, Leilei Huang, Taoyu Zhang, Wei Li 0257, Shuocheng Wang, Yibo Fan |
IEEE Trans. Circuits Syst. Video Technol. | 1 |
| 2026 | A Dual-Generalization Low-Light Enhancement Framework for Capsule Endoscopy Image Restoration and SegmentationabstractIn recent years, deep learning technology has automated the diagnosis of gastrointestinal (GI) tract disease, enabling doctor-machine collaborative diagnosis. However, the images captured by wireless capsule endoscopy (WCE) easily suffer from varying brightness levels of low-light degradation due to the complex structure of GI tract and the limitations of the light source, which impacts both human and machine diagnostic accuracy. Moreover, images may contain varying degrees of structural and semantic details even under a similar brightness level, which still can compromise segmentation accuracy. To address these issues, we propose a dual-generalization framework for low-light WCE images. Our framework includes an Image Guidance and Laplacian Fusion Module (IGLFM), a Brightness Level Generalization Module (BLGM) and a Wavelet Segmentation Generalization Module (WSGM). IGLFM and BLGM can restore low-light images across different brightness levels and WSGM can enhance segmentation accuracy by generalizing the varying degrees of details across images. With BLGM and WSGM, our framework enables two aspects of generalization: generalization to input images with different brightness levels and generalization to images with varying detail levels. Extensive experiments demonstrate that our method achieves significant performance under varying brightness levels and improvements in segmentation accuracy, surpassing the existing state-of-the-art (SOTA) method with gains of 4.70 dB / 0.022 (PSNR/SSIM) on Kvasir-Capsule dataset and 1.61 dB / 0.018 on RLE dataset. WSGM consistently improves segmentation accuracy across six popular networks, achieving up to + 4.7% mIoU and + 5.3% Dice improvements on RLE dataset. Our code will be available at https://github.com/superwsc/Dual-Gen-Frame. Shuocheng Wang, Ruoxi Zhu, Chengkang Huang, Minge Jing, Yibo Fan |
IEEE Trans. Medical Imaging | 4 |
| 2025 | Hardware-Accelerated Flow Interaction Graph Compression for High-Speed Anomaly Detection
Tong Yun, Yinxin Kuang, Haoyu Song 0001, Zhongyi Gu, Zhuang Ling, Zhiyu Zhang 0012, Chengkang Huang, Yibo Fan, Yang Xu 0010, Jianping Wang 0001, Bin Liu 0001 |
INFOCOM | 7 |
| 2025 | A Multiplier-Balanced and Area-Efficient Architecture for Low-Frequency Non-Separable Secondary TransformabstractThe existing hardware architectures for Low-Frequency Non-Separable Secondary Transform (LFNST) in VVC suffer from significant resource consumption of multipliers, along with relatively low utilization of these multipliers. In this context, this paper proposes a core unit with balanced multiplier utilization and an area-efficient overall architecture for LFNST. The proposed core unit is based on analyzing the average number of effective multiplications per sample across all transform units, ensuring balanced multiplier utilization and avoiding ineffective multiplications. Additionally, general multipliers can be replaced with a fused circuit that consists only of adders, shifters, and multiplexers. Through the proposed coefficient approximation scheme (CAS), the number of adders in the fused circuit is limited to one, significantly reducing resource consumption. The synthesis results indicate that the proposed design achieves a 72% reduction in normalized area compared to the state-of-the-art work. Furthermore, the proposed CAS can reduce the area of multiplier core unit by 22%, with negligible Bjøntegaard Delta-Rate loss. The proposed architecture supports processing 7680×4320@64fps videos when working at 200 MHz. Leilei Huang, Chengkang Huang, Bingjing Hou, Yibo Fan |
ISCAS | 4 |
| 2024 | Fast Adaptive Loop Filter Algorithm Based on the Optimization of Class MergingabstractAdaptive loop filter (ALF) is one of the new tools adopted in the next generation video coding standard Versatile Video Coding (VVC). ALF leads to a performance improvement of 2%∼6% at the expense of high computational complexity and long processing time. Especially when encoding, ALF accounts 5%∼20% for total encoding runtime. To solve this problem, this paper proposes a fast algorithm for ALF by optimizing the process of class merging, which is an important step of rate-distortion optimization (RDO) in ALF. Experimental results indicate that compared to the VVC Test Model (VTM-22.0), this method can reduce the ALF encoding runtime on average 48.16%, 60.65%, 56.15% under all-intra, low-delay P and random access configurations, with only 0.15%, 0.31%, 0.19% increase in luma Bjontegaard Delta-Bit Rate (BD-BR). Chengkang Huang, Leilei Huang, Shuocheng Wang, Yibo Fan |
VCIP | 1 |