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Hilbert Chen

dblp:397/7239 · DBLP profile ↗
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1ranked-venue papers
0as first author
1since 2021 · last 2025
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 1 · 1 since 2021

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
1 paper
Memory systems · 70% Processor architecture and microarchitecture · 30%

Topics — the 4 heaviest of 4, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Memory systems › processing-in-memory › computing-in-memory › in-SRAM computing
in-cache computing
0.912025
Multi-Dimensional Vector ISA Extension for Mobile In-Cache Computing · HPCA 2025
Processor architecture and microarchitecture
instruction set architecture
0.912025
Multi-Dimensional Vector ISA Extension for Mobile In-Cache Computing · HPCA 2025
Memory systems
processing-in-memory
0.912025
Multi-Dimensional Vector ISA Extension for Mobile In-Cache Computing · HPCA 2025
Memory systems
cache
0.312025
Multi-Dimensional Vector ISA Extension for Mobile In-Cache Computing · HPCA 2025
YearPublicationVenuePosition
2025 Multi-Dimensional Vector ISA Extension for Mobile In-Cache Computing
Alireza Khadem, Daichi Fujiki, Hilbert Chen, Yufeng Gu, Nishil Talati, Scott A. Mahlke, Reetuparna Das
HPCA3