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Anand Jagannathan

dblp:40/1149 · DBLP profile ↗
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1ranked-venue papers
1as first author
0since 2021 · last 1980
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 1 · 1 first-authorSoftware engineering, systems software and programming languages · 1 · 1 first-author

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
1 paper
Processor architecture and microarchitecture · 77% Embedded and real-time systems · 23%
Software engineering, system software, and programming languages
1 paper
Programming languages and type systems · 100%

Topics — the 2 heaviest of 3, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Programming languages and type systems › type systems
extensible data types
0.011980
A Technique for the Architectural Implementation of Software Subsystems · ISCA 1980
Embedded and real-time systems › embedded software
firmware implementation
0.011980
A Technique for the Architectural Implementation of Software Subsystems · ISCA 1980

Methods — techniques the papers use, named apart from their topics

type extension · 0.0
YearPublicationVenuePosition
1980 A Technique for the Architectural Implementation of Software Subsystems
abstract
This paper presents a technique to implement operating system software more efficiently: as part of the processor architecture. Such an'architectural'implementation has two significant advantages over a conventional'software'implementation. First, it allows performance critical modules of the operating system to be implemented through specialized hardware or firmware. Second, it allows the implementation of the operating system to evolve with technology without any change to the basic design structure. The basis for the proposed technique is the application of a software structuring methodology called'type extension'. A model for the architectural implementation of a subsystem, which is structured through this methodology, is presented. It is shown that this model encompasses all conventional forms of implementation—hardware, firmware, software. The model establishes that architectural implementation allows a range of implementation choices; a software implementation utilizes only a small subset of these choices.
Anand Jagannathan
ISCA1