This research to practice full paper represents the pedagogical setup of incorporating synchronous and asynchronous formative e-assessments to offer scalable mentoring support in a research seminar in the computer engineering domain. The objective of the research is to analyze the scalability of mentoring functions using synchronous and asynchronous formative e-assessment to support self-regulated learning. Therefore, the synchronous formative e-assessment namely the “Audience Response System” (ARS) is embedded during the live lecture. The asynchronous formative e-assessment coined as “Selftest” in the course is available in the learning management system as a self-paced course element. ARS is offered to activate, train and initiate a discussion with the provision of feedback on the summative responses of the students during the lecture. The Selftest provides the option of self-tutoring accompanying formative e-assessments with automated individual process-level feedback irrespective of correct or wrong responses. The approaches have been analyzed for six semesters by surveying students' perceptions of the user experience based on learning engagement and usability, students' self-perceived motivation intrinsically, extrinsically and amotivation, self-regulated learning support, and overall satisfaction. The survey result shows students' affirmation of the usability and usefulness along with overall satisfaction. The findings go along with their perceived growth in intrinsic and extrinsic motivation among the students and fulfilling their need for self-regulated learning support.

This research to practice full paper addresses the influence of Audience Response Systems (ARS) implemented into a structured mentoring process to increase the learning motivation of Computer Engineering students. One objective of mentoring in higher education is to encourage self-regulated learning by increasing intrinsic motivation. Motivation is an impetus for learning affecting the learner acceptance of the learning challenge and the introspective reflection on the learning process. In this study, the implementation of the mentoring process is shown by utilizing the ARS as a mentoring tool, implemented into the program structure following a structured e-mentoring process model. Furthermore, the detailed implementation of the particular process steps, which enables an evaluation of the entire mentoring process and providing the basis for future planning of the next mentoring process iteration is described. The evaluation of the methodology has been conducted over three semesters, with quantitative data collected by adapting the Academic Motivation Scale in the online survey to determine the influence of the ARS usage on extrinsic motivation, intrinsic motivation, and amotivation. Additionally, the usage frequency and the final grade are analyzed over the last five semester correlating survey results. The findings indicate comparatively higher intrinsic motivation than extrinsic motivation among the students and clearly indicate that ARS did not demotivate the students in learning. In consequence, the mentoring process, utilizing the ARS as mentoring tool, is implemented into an existing learning setting enabling the monitoring of the mentoring process resulting in an increasing learning motivation.

Software development in the automotive domain has been subject to changing and evolving processes for the last 15 years. As a result, the functionality of a vehicle is now developed independently of the target platform and communication technology. The actual mapping constraints to a hardware platform are then represented by a large parameter set stored in a configuration. This paradigm has spawned a heterogeneous tool environment for development of electronic control units (ECUs). On the one hand, this proceeding facilitates the development of reusable vehicle functions but on the other hand increases the difficulty for testing as well as error localization in the actual end system. The architecture of choice for platform independent ECU development in the automotive industry in Europe is AUTOSAR, which is in itself very complex but essential for automotive software developers. This makes it vital that students and junior developers of automotive software engineering can be trained in a fast and concise, industry-oriented way. In this paper, we present an educational concept which focuses on the inter-connections between different development and test phases in the automotive industry. It is mainly realized around two self-developed tools, which support learners and power a learning management system, all backed by an extensive AUTOSAR knowledge base. This system eases the learning and comprehension of automotive software development and test by hands-on-learning for both students and professional developers.

This Research-to-Practice Work-In-Progress paper explores the subjective evaluation of an Audience Response System (ARS) as a blended mentoring technology included in the pedagogical approach in computer engineering education. The ability to use scientific research methodologies represents a crucial competence for students in the field of computer engineering. In addition, this covers a wide range of sub competencies required for their future work according to the competency model of information technology (IT) industry. Imparting these competences is ensured by a seminar representing the testbed for this exploratory study. The study objective is to analyze the subjective evaluation of the ARS technology as blended mentoring method. Therefore, the ARS is used to created opportunities for the lecturer and the students to initiate discussions focused on the learning objectives in the seminar. The research approach bases on a qualitative exploration and set it into relation of final grade and ARS usage frequency. The qualitative results show the acceptance of the ARS technology by the students and indicate a suitable approach in education. In addition, positive feedback is received for the bidirectional discussions, confirming the expectation by the theory of Zone of Proximal Development. Furthermore, the grading analysis indicate a positive influence of the ARS on the final grade depending on usage frequency.

When integrating AUTOSAR software on an automotive ECU, errors may occur due to the large number of modules involved and/or improper timing. These errors manifest at the application level complicating the test and verification process. Since AUTOSAR has a layered architecture, it is often cumbersome to identify sources of errors. In this paper, to help integrating software on an ECU, we propose a technique to verify functionality and timing of generated AUTOSAR modules in a semi-automated manner. Our technique consists in defining test cases based on the interface descriptions of AUTOSAR modules and application software. This allows reliably identifying AUTOSAR modules affected by functional and/or timing errors and simplifies the test and verification process. We illustrate the benefits by our technique by means of a case study performed on the real hardware.

Testing on system level using a static and homogeneous architecture of clients is common practice. This paper introduces a new approach to use a heterogeneous and dynamic set of resource restricted test clients for automated testing. Due to changing resources and availability of the clients, the test case distribution needs to be recalculated dynamically during the test execution. All necessary conditions and parameters are represented by a formal model. It is shown that the algorithmic problem of DYNAMIC TESTPARTITIONING can be solved in polynomial time by a heuristic recursive algorithm. A testbench architecture is introduced and by simulation it is shown that the testbench can execute the test requirements within a small variation using a number of several hundred clients. The system can react dynamically on changing resources and availability of the test clients within several seconds. The approach is generic and can be adapted to a huge number of systems.

Cyber-physical systems typically involve a large number of mobile autonomous devices that closely interact with each other and their environment. Standard design and development techniques from the embedded domain fail to accurately model the dynamics of such systems and, hence, there is an increasing need for new programming models and abstractions. Component-based design approaches are a promising solution to manage the complexity of large-scale dynamic systems. However, existing such approaches either do not accurately model transitory interactions between components -- which are typical of cyber-physical systems -- or do not provide guarantees for real-time behavior which is essential in many safety-critical applications. To overcome this problem, in this paper, we present a component-based design technique based on DEECo (Dependable Emergent Ensembles of Components). The DEECo framework allows modeling large-scale dynamic systems by a set of interacting components. In contrast to other component-based design approaches from the literature, DEECo provides mechanisms to describe transitory interactions between components. We introduce necessary extensions to the DEECo design flow and integrate it with real-time analysis techniques that allow reasoning about timing behavior at the component-description level. Finally, we illustrate the simplicity and usefulness of our approach on a case study consisting of an intelligent crossroad system.

Dynamic run-time scheduling of design modules in partial reconfigurable (pRTR) platforms have recently become an active area. The pRTR integration in System-on-Chips depends on the efficiency of the technique for scheduling the modules. In this paper, an event based dynamic scheduling technique for hardware emulation is proposed. In consideration of given functional modules (e.g. controller, signal processing parts, memory) of a Design-under-Test (DuT), the emulator is directly scheduled by the run-time behavior of the modules. The events for controlling and reconfiguring the emulator depend on the communication activity of the functional modules itself. A HW/SW based generic emulator environment implemented on a state-of-the-art FPGA platform controls the reconfiguration sequence. The benefits are a decreasing number of run-time reconfigurations and an improved utilization of the FPGA resources of the emulator.

Summary form only given. Reconfigurable architectures have become more and more popular due to technology improvements. Next to the implementation of complex applications, the inter-module communication becomes a critical aspect in reconfigurable architectures. Especially, dependencies between reconfigured computation modules in real-time environments lead to massive reconfiguration efforts. The approach delivered presents runtime reconfigurable interface blocks (RTR-IFB) which can be used to solve those dependencies. The switching of modules during runtime, synchronization and inter-module communication is handled. As one effect, reconfigured modules can share the same execution resources without having a reconfiguration based communication gap. The RTR-IFB methodology extends actual concepts for inter-module communication. A design flow specifies how RTR-IFBs are integrated in the partial reconfiguration design flow. An example shows how an RTR-IFB can be integrated into a realistic design.

The complexity of embedded systems has increased rapidly during the last years. Several design approaches, including system-level design as well as IP-based design, have improved the design process. The rising number of instantiated components implicates a set of complex interfaces. High-speed data transmission rates, fault tolerance and predictability are key challenges for interface design. Thus high sophisticated interfaces have to be generated with respect to the different applications. In this paper we present a design methodology for application-specific real-time interfaces. The high-level design specification is done in a UML-based formalism. An interface-block (IFB) is derived from this specification. The IFB handles data sequencing and protocol generation. Both parts are controlled hierarchically. Within the IFB all application specific restrictions, channel features, and target platform characteristics are taken into account. Our approach is illustrated by a case study implementing a real-time communication between two interacting robots.