VLDB 2026 Research / reviewers in the wild / expert
Panagiotis Manolios
dblp:40/4888 · also Pete Manolios, Peter Manolios
· DBLP profile ↗
62ranked-venue papers
34as first author
7since 2021 · last 2027
0000-0003-0519-9699ORCID · verified
Domains — the database's venue-derived domains; a paper can count in several
Software engineering, systems software and programming languages · 37 · 16 first-author · 2 since 2021Theory of computation · 28 · 17 first-author · 3 since 2021Systems, architecture and hardware · 11 · 9 first-authorArtificial intelligence and machine learning · 7 · 7 first-authorDatabases, data management, data science and information retrieval · 5 · 1 first-author · 3 since 2021Security and privacy · 1 · 1 since 2021Human-computer interaction and ubiquitous computing · 1
| Year | Publication | Venue | Position |
|---|---|---|---|
| 2027 | The Dangerous Impact of Solver Imprecision on Data Management Techniques (and How to Avoid It)abstractLinear Programming (LP, MILP, ILP) solvers have been applied to data management problems for decades, with increasing use in the context of reverse data management and algorithmic fairness. While numerical imprecision caused by floating-point arithmetic is a known tradeoff made by fast solvers, it has received almost no attention in the data management literature relying on these tools. We demonstrate analytically and empirically that this can be a costly mistake. Even when supplying a theoretically correct (MI)LP program, the solver's answer may be incorrect, with potentially severe implications. This paper proposes a general solution that relies on "gap" parameters and efficient algorithms to explore the combinatorial search space of their values. Barring problem-specific solutions, current solver technology generally forces a choice between severely limited performance (when using exact solvers) and approximate solutions with little to no non-trivial quality guarantees (when using fast solvers that rely on floating-point arithmetic). Zikun Wang, Panagiotis Manolios, Mirek Riedewald |
EDBT | 3 |
| 2026 | Feedback & Synthesis in LLM-Assisted Termination ProofsabstractTermination - proving there are no inputs on which a function runs forever - is one of the most fundamental problems in software verification, and competitions comparing termination analysis tools have run for over twenty years. We integrate two state-of-the-art, open-weight LLMs with a theorem prover’s built-in automation to generate termination proofs, solving 39% more problems than the best LLM alone and more than tripling the number solved by the built-in analysis on our benchmark. This is the first, to our knowledge, integration of an LLM with a termination-analysis algorithm, and is generalizable to any theorem prover based on a functional language. Our design is informed by nine ablations considering what theorem-prover feedback helps the LLM and four experiments on how the model decomposes problems. Zeke Medley, Panagiotis Manolios |
ITP | 2 |
| 2025 | Synthesizing Scoring Functions for Rankings Using Symbolic Gradient DescentabstractGiven a relation and a ranking of its tuples, but no information about the ranking function, we are interested in synthesizing simple scoring functions that reproduce the ranking. Our system RankHow identifies linear scoring functions that minimize position-based error, while supporting flexible constraints on their weights. It is based on a new formulation as a mixed-integer linear program (MILP). While MILP is NP-hard in general, we show that RankHow is orders of magnitude faster than a tree-based algorithm that guarantees polynomial time complexity (PTIME) in the number of input tuples by reducing the MILP problem to many linear programs (LPs). We hypothesize that this is caused by 2 properties: First, the PTIME algorithm is equivalent to a naive evaluation strategy for the MILP program. Second, MILP solvers rely on advanced heuristics to reason holistically about the entire program, while the PTIME algorithm solves many sub-problems in isolation. To further improve RankHow's scalability, we propose a novel approximation technique called symbolic gradient descent (SYM-GD). It exploits problem structure to more quickly find local minima of the error function. Experiments demonstrate that RankHow can solve realistic problems, finding more accurate linear scoring functions than the state of the art. Panagiotis Manolios, Mirek Riedewald |
ICDE | 2 |
| 2024 | Formal Model-Driven Analysis of Resilience of GossipSub to Attacks from Misbehaving PeersabstractGossipSub is a new peer-to-peer communication protocol designed to counter attacks from misbehaving peers by controlling what information is sent and to whom, via a score function computed by each peer that captures positive and negative behaviors of its neighbors. The score function depends on several parameters (weights, caps, thresholds) that can be configured by applications using GossipSub. The specification for GossipSub is written in English and its resilience to attacks from misbehaving peers is supported empirically by emulation testing using an implementation in Golang.In this work we take a foundational approach to understanding the resilience of GossipSub to attacks from misbehaving peers. We build the first formal model of GossipSub, using the ACL2s theorem prover. Our model is officially endorsed by the GossipSub developers. It can simulate GossipSub networks of arbitrary size and topology, with arbitrarily configured peers, and can be used to prove and disprove theorems about the protocol. We formalize fundamental security properties stating that the score function is fair, penalizes bad behavior, and rewards good behavior. We prove that the score function is always fair, but can be configured in ways that either penalize good behavior or ignore bad behavior. Using our model, we run GossipSub with the specific configurations for two popular real-world applications: the FileCoin and Eth2.0 blockchains. We show that all properties hold for FileCoin. However, given any Eth2.0 network (of any topology and size) with any number of potentially misbehaving peers, we can synthesize attacks where these peers are able to continuously misbehave by never forwarding topic messages, while maintaining positive scores so that they are never pruned from the network by GossipSub. Max von Hippel, Panagiotis Manolios, Cristina Nita-Rotaru |
SP | 3 |
| 2023 | Why Not Yet: Fixing a Top-k Ranking that Is Not Fair to IndividualsabstractThis work considers why-not questions in the context of top-k queries and score-based ranking functions. Following the popular linear scalarization approach for multi-objective optimization, we study rankings based on the weighted sum of multiple scores. A given weight choice may be controversial or perceived as unfair to certain individuals or organizations, triggering the question why some entity of interest has not yet shown up in the top-k. We introduce various notions of such why-not-yet queries and formally define them as satisfiability or optimization problems, whose goal is to propose alternative ranking functions that address the placement of the entities of interest. While some why-not-yet problems have linear constraints, others require quantifiers, disjunction, and negation. We propose several optimizations, ranging from a monotonic-core construction that approximates the complex constraints with a conjunction of linear ones, to various techniques that let the user control the tradeoff between running time and approximation quality. Experiments with real and synthetic data demonstrate the practicality and scalability of our technique, showing its superiority compared to the state of the art (SOA). Panagiotis Manolios, Mirek Riedewald |
Proc. VLDB Endow. | 2 |
| 2022 | Enumerative Data Types with Constraints
Andrew T. Walter, David A. Greve, Panagiotis Manolios |
FMCAD | 3 |
| 2021 | Mathematical Programming Modulo Strings
Panagiotis Manolios |
FMCAD | 2 |
| 2020 | GACAL: Conjecture-Based Verification - (Competition Contribution)abstractAbstract GACAL verifies C programs by searching over the space of possible invariants, using traces of the input program to identify potential invariants. GACAL uses the ACL2s theorem prover to verify these potential invariants, using an interface provided by ACL2s for connecting with external tools. GACAL iteratively searches for and proves invariants of increasing complexity until the program is verified. Benjamin Quiring, Panagiotis Manolios |
TACAS (2) | 2 |
| 2019 | Local and Compositional Reasoning for Optimized Reactive SystemsabstractWe develop a compositional, algebraic theory of skipping refinement, as well as local proof methods to effectively analyze the correctness of optimized reactive systems. A verification methodology based on refinement involves showing that any infinite behavior of an optimized low-level implementation is a behavior of the high-level abstract specification. Skipping refinement is a recently introduced notion to reason about the correctness of optimized implementations that run faster than their specifications, i.e., a step in the implementation can skip multiple steps of the specification. For the class of systems that exhibit bounded skipping, existing proof methods have been shown to be amenable to mechanized verification using theorem provers and model-checkers. However, reasoning about the correctness of reactive systems that exhibit unbounded skipping using these proof methods requires reachability analysis, significantly increasing the verification effort. In this paper, we develop two new sound and complete proof methods for skipping refinement. Even in presence of unbounded skipping, these proof methods require only local reasoning and, therefore, are amenable to mechanized verification. We also show that skipping refinement is compositional, so it can be used in a stepwise refinement methodology. Finally, we illustrate the utility of the theory of skipping refinement by proving the correctness of an optimized event processing system. Mitesh Jain, Panagiotis Manolios |
CAV (1) | 2 |
| 2019 | Gamification of Loop-Invariant Discovery from CodeabstractSoftware verification addresses the important societal problem of software correctness by using tools to mechanically prove that software is free of errors. Since the software verification problem is undecidable, automated tools have limited capabilities; hence, to verify non-trivial software, engineers use human-in-the-loop theorem provers that depend on human-provided insights such as loop invariants. The effective use of modern theorem provers requires significant expertise and recent work has explored the possibility of creating human computation games that enable non-experts to find useful loop invariants. A common feature of these games is that they do not show the code to be verified. We present and evaluate a game which does show players code. Showing code poses a number of design challenges, such as avoiding cognitive overload, but, as our experimental evaluation confirms, also provides an opportunity for richer human-computer interactions that lead to more effective human-in-the-loop systems which augment the ability of programmers who are not verification experts to find loop invariants. Andrew T. Walter, Benjamin Boskin, Seth Cooper, Panagiotis Manolios |
HCOMP | 4 |
| 2019 | Automating requirements analysis and test case generation
Abha Moitra, Kit Siu, Andrew W. Crapo, Michael Durling, Panagiotis Manolios, Michael Meiners, Craig McMillan |
Requir. Eng. | 6 |
| 2018 | Towards Development of Complete and Conflict-Free RequirementsabstractWriting requirements is no easy task. Common problems include ambiguity in statements, specifications at the wrong level of abstraction, statements with inconsistent references to types, conflicting requirements, and incomplete requirements. These pitfalls lead to errors being introduced early in the design process. The longer the gap between error introduction and error discovery, the higher the cost associated with the error. To address the growing cost of system development, we introduce a tool called ASSERT" (Analysis of Semantic Specifications and Efficient generation of Requirements-based Tests) for capturing requirements, backed by a formal requirements analysis engine. ASSERT" also automatically generates a complete set of requirements-based test cases. Capturing requirements in an unambiguous way and then formally analyzing them with an automated theorem prover eliminates errors as soon as requirements are written. It also addresses the historical problem that analysis engines are hard to use for someone without formal methods expertise and analysis results are often difficult for the end-user to understand and make actionable. ASSERT"'s major contribution is to bring powerful requirements capture and analysis capability to the domain of the end-user. We provide explainable and automated formal analysis, something we found important for a tool's adoptability in industry. Abha Moitra, Kit Siu, Andrew W. Crapo, Harsh Raju Chamarthi, Michael Durling, Panagiotis Manolios, Michael Meiners |
RE | 8 |
| 2018 | Checking multi-view consistency of discrete systems with respect to periodic sampling abstractions
Maria Pittou, Panagiotis Manolios, Jan Reineke 0001, Stavros Tripakis |
Sci. Comput. Program. | 2 |
| 2015 | Skipping Refinement
Mitesh Jain, Panagiotis Manolios |
CAV (1) | 2 |
| 2015 | The Inez Mathematical Programming Modulo Theories Framework
Panagiotis Manolios, Jorge Pais, Vasilis Papavasileiou |
CAV (2) | 1 |
| 2014 | An Array-Oriented Language with Static Rank Polymorphism
Justin Slepak, Olin Shivers, Panagiotis Manolios |
ESOP | 3 |
| 2014 | ILP Modulo DataabstractThe vast quantity of data generated and captured every day has led to a pressing need for tools and processes to organize, analyze and interrelate this data. Automated reasoning and optimization tools with inherent support for data could enable advancements in a variety of contexts, from data-backed decision making to data-intensive scientific research. To this end, we introduce a decidable logic aimed at database analysis. Our logic extends quantifier-free Linear Integer Arithmetic with operators from Relational Algebra, like selection and cross product. We provide a scalable decision procedure that is based on the BC(T) architecture for ILP Modulo Theories. Our decision procedure makes use of database techniques. We also experimentally evaluate our approach, and discuss potential applications. Panagiotis Manolios, Vasilis Papavasileiou, Mirek Riedewald |
FMCAD | 1 |
| 2014 | Quantifier elimination by dependency sequents
Eugene Goldberg, Panagiotis Manolios |
Formal Methods Syst. Des. | 2 |
| 2013 | ILP Modulo Theories
Panagiotis Manolios, Vasilis Papavasileiou |
CAV | 1 |
| 2013 | Quantifier elimination via clause redundancy
Eugene Goldberg, Panagiotis Manolios |
FMCAD | 2 |
| 2013 | Counterexample Generation Meets Interactive Theorem Proving: Current Results and Future Opportunities
Panagiotis Manolios |
ITP | 1 |
| 2012 | Quantifier elimination by Dependency Sequents
Eugene Goldberg, Panagiotis Manolios |
FMCAD | 2 |
| 2011 | Synthesizing Cyber-Physical Architectural Models with Real-Time Constraints
Christine Hang, Panagiotis Manolios, Vasilis Papavasileiou |
CAV | 2 |
| 2011 | Automated specification analysis using an interactive theorem prover
Harsh Raju Chamarthi, Panagiotis Manolios |
FMCAD | 2 |
| 2011 | Pseudo-Boolean Solving by incremental translation to SAT
Panagiotis Manolios, Vasilis Papavasileiou |
FMCAD | 1 |
| 2011 | The ACL2 Sedan Theorem Proving System
Harsh Raju Chamarthi, Peter C. Dillinger, Panagiotis Manolios, Daron Vroon 0001 |
TACAS | 3 |
| 2010 | Interactive Termination Proofs Using Termination Cores
Panagiotis Manolios, Daron Vroon 0001 |
ITP | 1 |
| 2009 | Faster SAT solving with better CNF generationabstractBoolean satisfiability (SAT) solving has become an enabling technology with wide-ranging applications in numerous disciplines. These applications tend to be most naturally encoded using arbitrary Boolean expressions, but to use modern SAT solvers, one has to generate expressions in conjunctive normal form (CNF). This process can significantly affect SAT solving times. In this paper, we introduce a new linear-time CNF generation algorithm. We have implemented our algorithm and have conducted extensive experiments, which show that our algorithm leads to faster SAT solving times and smaller CNF than existing approaches. Benjamin Chambers, Panagiotis Manolios, Daron Vroon 0001 |
DATE | 2 |
| 2009 | All-Termination(T)
Panagiotis Manolios, Aaron Turon |
TACAS | 1 |
| 2009 | A PosterioriSoundness for Non-deterministic Abstract Interpretations
Matthew Might, Panagiotis Manolios |
VMCAI | 2 |
| 2008 | Efficient execution in an automated reasoning environmentabstractAbstract We describe a method that permits the user of a mechanized mathematical logic to write elegant logical definitions while allowing sound and efficient execution. In particular, the features supporting this method allow the user to install, in a logically sound way, alternative executable counterparts for logically defined functions. These alternatives are often much more efficient than the logically equivalent terms they replace. These features have been implemented in the ACL2 theorem prover, and we discuss several applications of the features in ACL2. David A. Greve, Matt Kaufmann, Panagiotis Manolios, J Strother Moore, Sandip Ray, José-Luis Ruiz-Reina, Robert W. Sumners, Daron Vroon 0001, Matthew Wilding |
J. Funct. Program. | 3 |
| 2008 | Automatic verification of safety and liveness for pipelined machines using WEB refinementabstractWe show how to automatically verify that complex pipelined machine models satisfy the same safety and liveness properties as their instruction-set architecture (ISA) models by using well-founded equivalence bisimulation (WEB) refinement. We show how to reduce WEB-refinement proof obligations to formulas expressible in the decidable logic of counter arithmetic with lambda expressions and uninterpreted functions (CLU). This allows us to automate the verification of the pipelined machine models by using the UCLID decision procedure to transform CLU formulas to Boolean satisfiability problems. To relate pipelined machine states to ISA states, we use the commitment and flushing refinement maps. We evaluate our work using 17 pipelined machine models that contain various features, including deep pipelines, precise exceptions, branch prediction, interrupts, and instruction queues. Our experimental results show that the overhead of proving liveness, obtained by comparing the cost of proving both safety and liveness with the cost of only proving safety, is about 17%, but depends on the refinement map used; for example, the liveness overhead is 23% when flushing is used and is negligible when commitment is used. Panagiotis Manolios, Sudarshan K. Srinivasan |
ACM Trans. Design Autom. Electr. Syst. | 1 |
| 2008 | WASP: Protecting Web Applications Using Positive Tainting and Syntax-Aware EvaluationabstractMany software systems have evolved to include a web-based component that makes them available to the public via the Internet and can expose them to a variety of web-based attacks. One of these attacks is SQL injection, which can give attackers unrestricted access to the databases underlying web applications and has become increasingly frequent and serious. This paper presents a new, highly automated approach for protecting web applications against SQL injection that has both conceptual and practical advantages over most existing techniques. From a conceptual standpoint, the approach is based on the novel idea of positive tainting and on the concept of syntax-aware evaluation. From a practical standpoint, our technique is precise and efficient and has minimal deployment requirements. We also present an extensive empirical evaluation of our approach performed using WASP, a tool that implements our technique. In the evaluation, we used WASP to protect a wide range of web applications while subjecting them to a large and varied set of attacks and legitimate accesses. WASP was able to stop all attacks and did not generate any false positives. Our studies also show that the overhead imposed by WASP was negligible in most cases. William G. J. Halfond, Alessandro Orso, Panagiotis Manolios |
IEEE Trans. Software Eng. | 3 |
| 2008 | A Refinement-Based Compositional Reasoning Framework for Pipelined Machine VerificationabstractWe present a refinement-based compositional framework for showing that pipelined machines satisfy the same safety and liveness properties as their non-pipelined specifications. Our framework consists of a set of convenient, easily applicable, and complete compositional proof rules. We show how to apply our compositional framework in the context of microprocessor verification to verify both abstract, term-level models and executable, bit-level models. Our framework enables us to verify machine models that are significantly more complex than the kinds of models that can be verified using current state-of-the-art automated decision procedures. For example, using our framework, we can verify a 32-bit, 10-stage, executable pipelined machine model. In addition, our compositional framework offers drastic improvements in the context of design debugging over monolithic approaches, in part because bugs are isolated to particular steps in the compositional proof and because the counter examples generated are much smaller. Panagiotis Manolios, Sudarshan K. Srinivasan |
IEEE Trans. Very Large Scale Integr. Syst. | 1 |
| 2007 | BAT: The Bit-Level Analysis Tool
Panagiotis Manolios, Sudarshan K. Srinivasan, Daron Vroon 0001 |
CAV | 1 |
| 2007 | Automating component-based system assemblyabstractOne of the major challenges in the development of large component-based software systems is the system assembly problem: from a sea of available components, which should be selected and how should they be connected, integrated, and assembled so that the overall system requirements are satisfied? We present a powerful framework for automatically solving the system assembly problem directly from system requirements. Our framework includes an expressive language for declaratively describing system-level requirements, including component interfaces and dependencies, resource requirements, safety properties, objective functions, and various types of constraints. We show how to automatically solve system assembly problems using verification technology that takes advantage of current advances in Boolean satisfiability methods. We have implemented our techniques in the CoBaSA tool (Component-Based System Assembly), and we have successfully applied it to several large-scale industrial examples. Panagiotis Manolios, Daron Vroon 0001, Gayatri Subramanian |
ISSTA | 1 |
| 2007 | Efficient Circuit to CNF Conversion
Panagiotis Manolios, Daron Vroon 0001 |
SAT | 1 |
| 2007 | Checking Pedigree Consistency with PCS
Panagiotis Manolios, Marc Galceran Oms, Sergi Oliva Valls |
TACAS | 1 |
| 2006 | Termination Analysis with Calling Context Graphs
Panagiotis Manolios, Daron Vroon 0001 |
CAV | 1 |
| 2006 | Monolithic verification of deep pipelines with collapsed flushingabstractWe introduce collapsed flushing, a new flushing-based refinement map for automatically verifying safety and liveness properties of term-level pipelined machine models. We also present a new method for handling liveness that is both simpler to define and easier to verify than previous approaches. To empirically validate collapsed flushing, we ran extensive experiments which show more than an order-of-magnitude improvement in verification times over standard flushing. Furthermore, by combining collapsed flushing with commitment refinement maps, we can monolithically verify complex pipelined machine models with deep pipelines - a salient feature of state-of-the-art microprocessor designs - that previous approaches cannot handle Roma Kane, Panagiotis Manolios, Sudarshan K. Srinivasan |
DATE | 2 |
| 2006 | Automatic memory reductions for RTL model verificationabstractWe present several techniques for automatically reducing memories in RTL designs. This includes a new memory abstraction algorithm that allows us to greatly reduce the size of memories and a technique based on-term rewriting that further improves the abstraction. In contrast to previously proposed methods for abstracting memories of RTL designs, our methods are general---e.g., they allow us to arbitrarily and directly compare memories---and they are sound and complete---e.g., there are no false positives or negatives. In addition, the combination of our techniques allows us to automatically verify RTL pipelined machine designs beyond the reach of current state-of-the-art methods, as our experimental results show. Panagiotis Manolios, Sudarshan K. Srinivasan, Daron Vroon 0001 |
ICCAD | 1 |
| 2006 | Integrating static analysis and general-purpose theorem proving for termination analysisabstractWe present emerging results from our work on termination analysis of software systems. We have designed a static analysis algorithm which attains increased precision and flexibility by issuing queries to a theorem prover. We have implemented our algorithm and initial results show that we obtain a significant improvement over the current state-of-the-art in termination analyses. We also outline how our approach, by integrating theorem proving queries into static analyses, can significantly impact the design of general-purpose static analyses. Panagiotis Manolios, Daron Vroon 0001 |
ICSE | 1 |
| 2006 | Implementing Survey Propagation on Graphics Processing Units
Panagiotis Manolios |
SAT | 1 |
| 2006 | Using positive tainting and syntax-aware evaluation to counter SQL injection attacksabstractSQL injection attacks pose a serious threat to the security of Web applications because they can give attackers unrestricted access to databases that contain sensitive information. In this paper, we propose a new, highly automated approach for protecting existing Web applications against SQL injection. Our approach has both conceptual and practical advantages over most existing techniques. From the conceptual standpoint, the approach is based on the novel idea of positive tainting and the concept of syntax-aware evaluation. From the practical standpoint, our technique is at the same time precise and efficient and has minimal deployment requirements. The paper also describes wasp, a tool that implements our technique, and a set of studies performed to evaluate our approach. In the studies, we used our tool to protect several Web applications and then subjected them to a large and varied set of attacks and legitimate accesses. The evaluation was a complete success: wasp successfully and efficiently stopped all of the attacks without generating any false positives. William G. J. Halfond, Alessandro Orso, Panagiotis Manolios |
SIGSOFT FSE | 3 |
| 2006 | A Framework for Verifying Bit-Level Pipelined Machines Based on Automated Deduction and Decision Procedures
Panagiotis Manolios, Sudarshan K. Srinivasan |
J. Autom. Reason. | 1 |
| 2005 | Refinement Maps for Efficient Verification of Processor ModelsabstractWhile most of the effort in improving verification times for pipelined machine verification has focused on faster decision procedures, we show that the refinement maps used also have a drastic impact on verification times. We introduce a new class of refinement maps for pipelined machine verification, and using the state-of-the-art verification tools UCLID and Siege we show that one can attain several orders of magnitude improvements in verification times over the standard flushing-based refinement maps, even enabling the verification of machines that are too complex to otherwise automatically verify. Panagiotis Manolios, Sudarshan K. Srinivasan |
DATE | 1 |
| 2005 | Verification of executable pipelined machines with bit-level interfacesabstractWe show how to verify pipelined machine models with bit-level interfaces by using a combination of deductive reasoning and decision procedures. While decision procedures such as those implemented in UCLID can be used to verify pipelined machines, the models are at the term level: they abstract away the datapath, require the use of numerous abstractions, implement a small subset of the instruction set, and are far from executable. In contrast, we focus on verifying executable machines with bit-level interfaces. Such proofs have previously required substantial expert guidance and the use of deductive reasoning engines. We show that by integrating UCLID with the ACL2 theorem proving system, we can use ACL2 to reduce the proof that an executable, bit-level machine refines its instruction set architecture to a proof that a term level abstraction of the bit-level machine refines the instruction set architecture, which is then handled automatically by UCLID. In this way, we exploit the strengths of ACL2 and UCLID to prove theorems that are not possible to even state using UCLID and that would require prohibitively more effort using just ACL2. Panagiotis Manolios, Sudarshan K. Srinivasan |
ICCAD | 1 |
| 2005 | A complete compositional reasoning framework for the efficient verification of pipelined machinesabstractWe present a compositional reasoning framework based on refinement for verifying that pipelined machines satisfy the same safety and liveness properties as their instruction set architectures. Our framework consists of a set of convenient, easily-applicable, and complete compositional proof rules. We show that our framework greatly extends the applicability of decision procedures by verifying a complex, deeply pipelined machine that state-of-the-art tools cannot currently handle. We discuss how our framework can be added to the design cycle and highlight what arguably is the most important benefit of our approach over current methods, that the counterexamples generated are much simpler, as bugs are isolated to a particular step in the composition proof. Panagiotis Manolios, Sudarshan K. Srinivasan |
ICCAD | 1 |
| 2005 | A computationally ef~cient method based on commitment re~nement maps for verifying pipelined machinesabstractWe introduce a new method of automating the verification of term-level pipelined machine models that is based on commitment refinement maps. Our method is much simpler to implement than current alternatives. More importantly, as our extensive experiments show, our method leads to more than a 30-fold improvement in verification times over the standard approaches to pipeline machine verification, which use refinement maps based on flushing and commitment. In addition, we can verify machines that are too complex to directly verify using flushing-based refinement maps Panagiotis Manolios, Sudarshan K. Srinivasan |
MEMOCODE | 1 |
| 2005 | Ordinal Arithmetic: Algorithms and Mechanization
Panagiotis Manolios, Daron Vroon 0001 |
J. Autom. Reason. | 1 |
| 2004 | Automatic Verification of Safety and Liveness for XScale-Like Processor Models Using WEB RefinementsabstractWe show how to automatically verify that complex XScale-like pipelined machine models satisfy the same safety and liveness properties as their corresponding instruction set architecture models, by using the notion of well-founded equivalence bisimulation (WEB) refinement. Automation is achieved by reducing the WEB-refinement proof obligation to a formula in the logic of counter arithmetic with lambda expressions and uninterpreted functions (CLU). We use the tool UCLID to transform the resulting CLU formula into a Boolean formula, which is then checked with a SAT solver. The models we verify include features such as out of order completion, precise exceptions, branch prediction, and interrupts. We use two types of refinement maps. In one, flushing is used to map pipelined machine states to instruction set architecture states; in the other, we use the commitment approach, which is the dual of flushing, since partially completed instructions are invalidated. We present experimental results for all the machines modelled, including verification times. For our application, we found that the time spent proving liveness accounts for about 5% of the over-all verification time. Panagiotis Manolios, Sudarshan K. Srinivasan |
DATE | 1 |
| 2004 | Bloom Filters in Probabilistic Verification
Peter C. Dillinger, Panagiotis Manolios |
FMCAD | 2 |
| 2004 | Integrating Reasoning About Ordinal Arithmetic into ACL2
Panagiotis Manolios, Daron Vroon 0001 |
FMCAD | 1 |
| 2003 | Algorithms for Ordinal Arithmetic
Panagiotis Manolios, Daron Vroon 0001 |
CADE | 1 |
| 2003 | Brief announcement: branching time refinement
Panagiotis Manolios |
PODC | 1 |
| 2003 | A lattice-theoretic characterization of safety and livenessabstractThe distinction between safety and liveness properties is due to Lamport who gave the following informal characterization. Safety properties assert that nothing bad ever happens while liveness properties assert that something good happens eventually. In a well-known paper Alpern and Schneider gave a topological characterization of safety and liveness for the linear time framework. Gumm has stated these notions in the more abstract setting of V-complete Boolean algebras. Recently, we characterized safety and liveness for the branching time framework and found that neither the topological characterization nor Gumm's characterization were general enough for our needs. We present a lattice theoretic characterization that allows us to unify previous results on safety and liveness, including the results for the linear time and branching time frameworks and for w-regular string and tree languages. Panagiotis Manolios, Richard J. Trefler |
PODC | 1 |
| 2003 | Partial Functions in ACL2
Panagiotis Manolios, J Strother Moore |
J. Autom. Reason. | 1 |
| 2001 | Safety and Liveness in Branching TimeabstractExtends B. Alpern & F.B. Schneider's linear time characterization of safety and liveness properties to branching time, where properties are sets of trees. We define two closure operators that give rise to the following four extremal types of properties: universally safe, existentially safe, universally live and existentially live. The distinction between universal and existential properties captures the difference between the CTL (computation tree logic) path quantifiers /spl forall/ (for all paths) and /spl exist/ (there is a path). We show that every branching time property is the intersection of an existentially safe property and an existentially live property, a universally safe property and a universally live property, and an existentially safe property and a universally live property. We also examine how our closure operators behave on linear-time properties. We then focus on sets of finitely branching trees and show that our closure operators agree on linear-time safety properties. Furthermore, if a set of trees is given implicitly as a Rabin tree automaton /spl Bscr/, we show that it is possible to compute the Rabin automata corresponding to the closures of the language of /spl Bscr/. This allows us to effectively compute /spl Bscr//sub safe/ and /spl Bscr//sub live/ such that the language of /spl Bscr/ is the intersection of the languages of /spl Bscr//sub safe/ and /spl Bscr//sub live/. As above, /spl Bscr//sub safe/ and /spl Bscr//sub live/ can be chosen so that their languages are existentially safe and existentially live, universally safe and universally live, or existentially safe and universally live. Panagiotis Manolios, Richard J. Trefler |
LICS | 1 |
| 2001 | On the desirability of mechanizing calculational proofs
Panagiotis Manolios, J Strother Moore |
Inf. Process. Lett. | 1 |
| 2000 | Correctness of Pipelined Machines
Panagiotis Manolios |
FMCAD | 1 |
| 1999 | Linking Theorem Proving and Model-Checking with Well-Founded Bisimulation
Panagiotis Manolios, Kedar S. Namjoshi, Robert Summers |
CAV | 1 |
| 1994 | First-Order Recurrent Neural Networks and Deterministic Finite State AutomataabstractWe examine the correspondence between first-order recurrent neural networks and deterministic finite state automata. We begin with the problem of inducing deterministic finite state automata from finite training sets, that include both positive and negative examples, an NP-hard problem (Angluin and Smith 1983). We use a neural network architecture with two recurrent layers, which we argue can approximate any discrete-time, time-invariant dynamic system, with computation of the full gradient during learning. The networks are trained to classify strings as belonging or not belonging to the grammar. The training sets used contain only short strings, and the sets are constructed in a way that does not require a priori knowledge of the grammar. After training, the networks are tested using various test sets with strings of length up to 1000, and are often able to correctly classify all the test strings. These results are comparable to those obtained with second-order networks (Giles et al. 1992; Watrous and Kuhn 1992a; Zeng et al. 1993). We observe that the networks emulate finite state automata, confirming the results of other authors, and we use a vector quantization algorithm to extract deterministic finite state automata after training and during testing of the networks, obtaining a table listing the start state, accept states, reject states, all transitions from the states, as well as some useful statistics. We examine the correspondence between finite state automata and neural networks in detail, showing two major stages in the learning process. To this end, we use a graphics module, which graphically depicts the states of the network during the learning and testing phases. We examine the networks' performance when tested on strings much longer than those in the training set, noting a measure based on clustering that is correlated to the stability of the networks. Finally, we observe that with sufficiently long training times, neural networks can become true finite state automata, due to the attractor structure of their dynamics. Panagiotis Manolios, Robert Fanelli |
Neural Comput. | 1 |