Demo Data from VLDB 2026 / reviewers in the wild / expert
Eduard Ebert
dblp:401/6713
· DBLP profile ↗
1ranked-venue papers
0as first author
1since 2021 · last 2025
0009-0006-1938-2709ORCID · reported
Domains — the database's venue-derived domains; a paper can count in several
Systems, architecture and hardware · 1 · 1 since 2021Software engineering, systems software and programming languages · 1 · 1 since 2021
Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.
| Computer architecture, parallel and distributed computing, and storage systems
1 paper |
Processor architecture and microarchitecture · 100% | |
| Network and information security
1 paper |
Hardware security and side channels · 100% |
Topics — the 2 heaviest of 3, each with the papers that count most for it
| Topic | Weight | Papers | Last | Evidence papers |
|---|---|---|---|---|
Processor architecture and microarchitecture › memory system microarchitecture
hardware prefetcher |
0.9 | 1 | 2025 | ShadowLoad: Injecting State into Hardware Prefetchers · ASPLOS (2) 2025 |
Hardware security and side channels
microarchitectural side channel |
0.3 | 1 | 2025 | ShadowLoad: Injecting State into Hardware Prefetchers · ASPLOS (2) 2025 |
| Year | Publication | Venue | Position |
|---|---|---|---|
| 2025 | ShadowLoad: Injecting State into Hardware PrefetchersabstractHardware prefetchers are an optimization in modern CPUs that predict memory accesses and preemptively load the corresponding value into the cache. Previous work showed that the internal state of hardware prefetchers can act as a side channel, leaking information across security boundaries such as processes, user and kernel space, and even trusted execution environments. Lorenz Hetterich, Fabian Thomas, Lukas Gerlach 0001, Ruiyi Zhang 0001, Nils Bernsdorf, Eduard Ebert, Michael Schwarz 0001 |
ASPLOS (2) | 6 |