Demo Data from VLDB 2026 / reviewers in the wild / expert
Pawel Szczerbuk
dblp:409/0613
· DBLP profile ↗
1ranked-venue papers
0as first author
1since 2021 · last 2026
0009-0004-0203-6610ORCID · reported
Domains — the database's venue-derived domains; a paper can count in several
Systems, architecture and hardware · 1 · 1 since 2021Software engineering, systems software and programming languages · 1 · 1 since 2021
Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.
| Computer architecture, parallel and distributed computing, and storage systems
1 paper |
Hardware accelerators and domain-specific architectures · 50% High-performance computing · 50% | |
| Software engineering, system software, and programming languages
1 paper |
Compilers and program optimization · 100% |
Topics — the 3 heaviest of 3, each with the papers that count most for it
| Topic | Weight | Papers | Last | Evidence papers |
|---|---|---|---|---|
Compilers and program optimization
code generation |
1.0 | 1 | 2026 | Linear Layouts: Robust Code Generation of Efficient Tensor Computation Using F_2 · ASPLOS (1) 2026 |
Hardware accelerators and domain-specific architectures
machine learning accelerator |
1.0 | 1 | 2026 | Linear Layouts: Robust Code Generation of Efficient Tensor Computation Using F_2 · ASPLOS (1) 2026 |
High-performance computing
tensor computation |
1.0 | 1 | 2026 | Linear Layouts: Robust Code Generation of Efficient Tensor Computation Using F_2 · ASPLOS (1) 2026 |
Methods — techniques the papers use, named apart from their topics
linear algebra over f2 · 2.0layout-to-layout conversion · 2.0binary matrices · 2.0
| Year | Publication | Venue | Position |
|---|---|---|---|
| 2026 | Linear Layouts: Robust Code Generation of Efficient Tensor Computation Using F_2abstractEfficient tensor computation is a cornerstone of modern deep learning (DL) workloads, yet existing approaches struggle to achieve flexible and performant design and implementation of tensor layouts -- mappings between logical tensors and hardware resources. The increasing complexity of DL algorithms and hardware demands a generic and systematic approach to handling tensor layouts. In this work, we introduce Linear Layouts, a novel approach that models tensor layouts using linear algebra over F2. By representing tensor layouts as binary matrices acting on the bits of the hardware representation, our approach enables a generic layout definition—as opposed to the classical case-by-case approach -- and allows for generic layout-to-layout conversions, eliminating the quadratic explosion that plagues existing solutions. We integrate linear layouts with Triton and demonstrate their effectiveness in optimizing individual Triton operators as well as kernels written in Triton. We also show that linear layouts reduce engineering effort in the compiler backend while fixing several bugs in Triton's legacy layout system. Keren Zhou 0001, Mario Lezcano Casado, Adam P. Goucher, Akhmed Rakhmati, Jeff Niu, Justin Lebar, Pawel Szczerbuk, Peter Bell 0008, Phil Tillet, Thomas Raoux, Zahi Moudallal |
ASPLOS (1) | 7 |