Ignacio Alegre

dblp:41/5061 · DBLP profile ↗
← Back
3ranked-venue papers
0as first author
0since 2021 · last 1987
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 3Software engineering, systems software and programming languages · 1

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
3 papers
Interconnection networks and networks-on-chip · 42% Processor architecture and microarchitecture · 19% Memory systems · 19%
Theoretical computer science
2 papers
Mathematical optimization · 64% Graph algorithms and graph theory · 18% Combinatorics and discrete mathematics · 18%

Topics — the 9 heaviest of 10, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Interconnection networks and networks-on-chip
network topology
0.021987
A Discrete Optimization Problem in Local Networks and Data Alignment · IEEE Trans. Computers 1987
Line Digraph Iterations and the (d,k) Problem for Directed Graphs · ISCA 1983
Memory systems › data layout optimization
data alignment
0.011987
A Discrete Optimization Problem in Local Networks and Data Alignment · IEEE Trans. Computers 1987
Interconnection networks and networks-on-chip › network topology › loop networks
double-loop network
0.011987
A Discrete Optimization Problem in Local Networks and Data Alignment · IEEE Trans. Computers 1987
Processor architecture and microarchitecture › SIMD
SIMD processor
0.011987
A Discrete Optimization Problem in Local Networks and Data Alignment · IEEE Trans. Computers 1987
Mathematical optimization
combinatorial optimization
0.011987
A Discrete Optimization Problem in Local Networks and Data Alignment · IEEE Trans. Computers 1987
Mathematical optimization
discrete optimization
0.011987
A Discrete Optimization Problem in Local Networks and Data Alignment · IEEE Trans. Computers 1987
Combinatorics and discrete mathematics › extremal combinatorics › extremal graph theory
moore bound
0.011983
Line Digraph Iterations and the (d,k) Problem for Directed Graphs · ISCA 1983
Performance modeling and evaluation › network performance analysis
bandwidth analysis
0.011982
Bandwidth of Crossbar and Multiple-Bus Connections for Multiprocessors · IEEE Trans. Computers 1982
Performance modeling and evaluation
queueing models
0.011982
Bandwidth of Crossbar and Multiple-Bus Connections for Multiprocessors · IEEE Trans. Computers 1982

Methods — techniques the papers use, named apart from their topics

discrete optimization · 0.0local routing algorithm · 0.0line digraph iteration · 0.0stochastic modeling · 0.0
YearPublicationVenuePosition
1987 A Discrete Optimization Problem in Local Networks and Data Alignment
abstract
This paper presents the solution of the following optimization problem that appears in the design of double-loop structures for local networks and also in data memory, allocation and data alignment in SIMD processors.
Miguel Angel Fiol, José Luis Andres Yebra, Ignacio Alegre, Mateo Valero
IEEE Trans. Computers3
1983 Line Digraph Iterations and the (d,k) Problem for Directed Graphs
abstract
We consider in this paper the (d,k) problem for directed graphs: to maximize the number of vertices in a digraph of degree d and diameter k. For any values of d and k, we construct a graph with a number of vertices larger than (d 2-1)/d2 times the (non-attainable) Moore bound. In particular, this solves the (d,k) digraph problem for k=2. We also show that these graphs can be obtained as line digraph iterations and that this technique provides us with a simple local routing algorithm for the corresponding networks.
Miguel Angel Fiol, Ignacio Alegre, José Luis Andres Yebra
ISCA2
1982 Bandwidth of Crossbar and Multiple-Bus Connections for Multiprocessors
abstract
In this paper we compare the effective bandwidth in a multiprocessor with shared memory using as interconnection networks the crossbar or the multiple-bus. We consider a system with N processors and N memory modules, in which the processor requests to the memory modules are independent and uniformly distributed random variables. We consider two cases: in the first the processor makes another request immediately after a memory service, and in the second there is some internal processing time.
Tomás Lang, Mateo Valero, Ignacio Alegre
IEEE Trans. Computers3