VLDB 2026 Research / reviewers in the wild / expert
Leshan Li
dblp:415/5153
· DBLP profile ↗
3ranked-venue papers
2as first author
3since 2021 · last 2026
0009-0001-1145-3131ORCID · reported
Domains — the database's venue-derived domains; a paper can count in several
Systems, architecture and hardware · 3 · 2 first-author · 3 since 2021Software engineering, systems software and programming languages · 1 · 1 since 2021
Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.
| Computer architecture, parallel and distributed computing, and storage systems
2 papers |
Hardware accelerators and domain-specific architectures · 54% Emerging computing paradigms · 24% Reconfigurable computing and FPGAs · 16% |
Topics — the 6 heaviest of 8, each with the papers that count most for it
| Topic | Weight | Papers | Last | Evidence papers |
|---|---|---|---|---|
Emerging computing paradigms › neuromorphic computing › neuromorphic vision
event-based vision |
1.0 | 1 | 2026 | Espresso: Exploiting the Sparsity Property in Brain-Inspired Vision Sensors With Spatiotemporal Ordering · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2026 |
Hardware accelerators and domain-specific architectures
machine learning accelerator |
1.0 | 1 | 2026 | Espresso: Exploiting the Sparsity Property in Brain-Inspired Vision Sensors With Spatiotemporal Ordering · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2026 |
Hardware accelerators and domain-specific architectures › vision accelerator
event-based vision accelerator |
0.9 | 1 | 2025 | Espresso: Exploiting the Sparsity Property in Event Sensors with Spatiotemporal Ordering · DAC 2025 |
Reconfigurable computing and FPGAs › FPGA accelerator
FPGA accelerator design |
0.9 | 1 | 2025 | Espresso: Exploiting the Sparsity Property in Event Sensors with Spatiotemporal Ordering · DAC 2025 |
Embedded and real-time systems › real-time software
real-time stream processing |
0.3 | 1 | 2026 | Espresso: Exploiting the Sparsity Property in Brain-Inspired Vision Sensors With Spatiotemporal Ordering · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2026 |
Emerging computing paradigms
neuromorphic computing |
0.3 | 1 | 2025 | Espresso: Exploiting the Sparsity Property in Event Sensors with Spatiotemporal Ordering · DAC 2025 |
Methods — techniques the papers use, named apart from their topics
queue mechanism · 1.0hash table · 1.0finite state machine · 1.0spatiotemporal ordering · 0.9sparsity exploitation · 0.9
| Year | Publication | Venue | Position |
|---|---|---|---|
| 2026 | Optimizing Spatial Data Structure with Near-Cache Acceleration by Exploiting Physical Locality
Haoran Pei, Zijian Pan, Songchen Ma, Leshan Li, Xinglong Ji |
ISCA | 7 |
| 2026 | Espresso: Exploiting the Sparsity Property in Brain-Inspired Vision Sensors With Spatiotemporal OrderingabstractBrain-inspired vision sensors (BVSs), drawing inspiration from the human visual system, produce sparse, high-temporal-resolution data stream capable of capturing rapid object motion. However, real-time processing of such data while preserving its inherent sparsity presents a critical challenge for practical deployment. A key challenge is to leverage the spatiotemporal correlations among event stream. Overlooking these correlations leads to prohibitively high query costs that even negate the benefits of sparsity, while exploiting them introduces complications such as input-output order conflicts and trade-offs between memory usage and latency. To address this, we present Espresso, an efficient hardware architecture that leverages the spatiotemporal order of events while explicitly preserving sparsity, achieving low-latency stream processing of event data. We first formalize a spatiotemporal order representation that identifies key features for stream processing on sparse events. Building on this, Espresso decouples output window address from input event address, resolving order conflicts via a dedicated queue mechanism and minimizing memory overhead through an optimized hash table. This enables immediate window-wise processing with minimal latency. To coordinate the pipeline, we design the Event-Scheduler, a streamlined finite state machine that prunes computations on zero values and aligns input-output stream order discrepancies. Integrated together, these modules deliver scalable, high-throughput processing for event-driven vision tasks. Espresso achieves up to 5000 fps, offering a 5.1× performance improvement over embedded GPUs. With parallel instantiations, it exceeds over 7000 fps in structured scenes and maintains over 2000 fps under complex-environment scenarios with minimal hardware overhead. These results establish Espresso as an efficient and scalable solution for real-time event-based vision processing, demonstrating the importance of spatiotemporal ordering in unlocking the full potential of BVSs. Leshan Li, Taoyi Wang, Mingtao Ou, Xinglong Ji |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. | 1 |
| 2025 | Espresso: Exploiting the Sparsity Property in Event Sensors with Spatiotemporal OrderingabstractEvent-based vision sensors are novel cameras inspired by human eyes, capable of capturing the rapid motion of objects with the high-speed sparse event stream. However, it is challenging to efficiently stream process event data without demolishing its sparsity. In this paper, we design Espresso, an architecture for event-based vision processing that can efficiently stream spatiotemporal events while preserving sparsity. We implement Espresso on the FPGA platform and design experiments to compare the performance with embedded GPU and line-buffer-based accelerator. In real-world scenarios, Espresso achieves throughput up to 5000 fps, which is $5.1 \times$ higher than the embedded GPU. Leshan Li, Mingtao Ou, Xinglong Ji |
DAC | 1 |