Demo Data from VLDB 2026 / reviewers in the wild / expert
Martin Pohlack
dblp:42/3318
· DBLP profile ↗
8ranked-venue papers
0as first author
0since 2021 · last 2020
—ORCID · none
Domains — the database's venue-derived domains; a paper can count in several
Systems, architecture and hardware · 3Software engineering, systems software and programming languages · 2Applied, interdisciplinary, general and emerging computing · 2Graphics, computer vision, multimedia, augmented reality and games · 1Theory of computation · 1
Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.
| Computer architecture, parallel and distributed computing, and storage systems
4 papers |
Processor architecture and microarchitecture · 43% Parallel and multicore computing · 37% Storage systems · 12% | |
| Software engineering, system software, and programming languages
1 paper |
Concurrent programming · 87% Compilers and program optimization · 13% | |
| Computer graphics and multimedia
1 paper |
Audio and music processing · 100% |
Topics — the 16 heaviest of 16, each with the papers that count most for it
| Topic | Weight | Papers | Last | Evidence papers |
|---|---|---|---|---|
Concurrent programming › transactional memory
hardware transactional memory |
0.1 | 1 | 2010 | Evaluation of AMD's advanced synchronization facility within a complete transactional memory stack · EuroSys 2010 |
Concurrent programming
transactional memory |
0.1 | 1 | 2010 | Evaluation of AMD's advanced synchronization facility within a complete transactional memory stack · EuroSys 2010 |
Parallel and multicore computing › transactional memory
hardware transactional memory |
0.1 | 1 | 2010 | ASF: AMD64 Extension for Lock-Free Data Structures and Transactional Memory · MICRO 2010 |
Processor architecture and microarchitecture
instruction set architecture |
0.1 | 1 | 2010 | ASF: AMD64 Extension for Lock-Free Data Structures and Transactional Memory · MICRO 2010 |
Processor architecture and microarchitecture › instruction set architecture
instruction set extension |
0.1 | 1 | 2010 | Evaluation of AMD's advanced synchronization facility within a complete transactional memory stack · EuroSys 2010 |
Processor architecture and microarchitecture
speculative execution |
0.1 | 1 | 2010 | ASF: AMD64 Extension for Lock-Free Data Structures and Transactional Memory · MICRO 2010 |
Parallel and multicore computing
transactional memory |
0.1 | 1 | 2010 | ASF: AMD64 Extension for Lock-Free Data Structures and Transactional Memory · MICRO 2010 |
Audio and music processing › speech recognition › decoding
video decoding |
0.1 | 1 | 2006 | Principles for the Prediction of Video Decoding Times Applied to MPEG-1/2 and MPEG-4 Part 2 Video · RTSS 2006 |
Storage systems › i/o scheduling
disk scheduling |
0.0 | 1 | 2003 | Rotational-Position-Aware Real-Time Disk Scheduling Using a Dynamic Active Subset (DAS) · RTSS 2003 |
Storage systems › i/o scheduling › disk scheduling
real-time disk scheduling |
0.0 | 1 | 2003 | Rotational-Position-Aware Real-Time Disk Scheduling Using a Dynamic Active Subset (DAS) · RTSS 2003 |
Embedded and real-time systems
real-time scheduling |
0.0 | 1 | 2003 | Rotational-Position-Aware Real-Time Disk Scheduling Using a Dynamic Active Subset (DAS) · RTSS 2003 |
Compilers and program optimization › compiler construction
compiler support for transactional memory |
0.0 | 1 | 2010 | Evaluation of AMD's advanced synchronization facility within a complete transactional memory stack · EuroSys 2010 |
Parallel and multicore computing › concurrent data structures
lock-free data structures |
0.0 | 1 | 2010 | ASF: AMD64 Extension for Lock-Free Data Structures and Transactional Memory · MICRO 2010 |
Parallel and multicore computing
synchronization |
0.0 | 1 | 2010 | ASF: AMD64 Extension for Lock-Free Data Structures and Transactional Memory · MICRO 2010 |
Embedded and real-time systems › soft real-time systems
real-time multimedia |
0.0 | 1 | 2006 | Principles for the Prediction of Video Decoding Times Applied to MPEG-1/2 and MPEG-4 Part 2 Video · RTSS 2006 |
Storage systems
storage reliability |
0.0 | 1 | 2003 | Rotational-Position-Aware Real-Time Disk Scheduling Using a Dynamic Active Subset (DAS) · RTSS 2003 |
Methods — techniques the papers use, named apart from their topics
software fallback · 0.2cycle-accurate simulation · 0.2compiler extension · 0.2performance modeling · 0.1per-frame decoding time prediction · 0.1out-of-order simulation · 0.1rotational position optimization · 0.0dynamic active subset · 0.0
| Year | Publication | Venue | Position |
|---|---|---|---|
| 2020 | Using model checking tools to triage the severity of security bugs in the Xen hypervisorabstractIn practice, few security bugs found in source code are urgent, but quickly identifying which ones are is hard.We describe the application of bounded model checking to triaging reported issues quickly at the cloud service provider Amazon Web Services (AWS).We focus on the job of reactive security experts who need to determine the severity of bugs found in the Xen hypervisor.We show that, using our publicly available extensions to the model checker CBMC, a security expert can obtain traces to construct security tests and estimate the severity of the reported finding within 15 minutes.We believe that the changes made to the model checker, as well as the methodology for using tools in this scenario, will generalise to other organisations and environments. Byron Cook, Björn Döbel, Daniel Kroening, Norbert Manthey, Martin Pohlack, Elizabeth Polgreen, Michael Tautschnig, Pawel Wieczorkiewicz |
FMCAD | 5 |
| 2010 | Evaluation of AMD's advanced synchronization facility within a complete transactional memory stackabstractAMD's Advanced Synchronization Facility (ASF) is an x86 instruction set extension proposal intended to simplify and speed up the synchronization of concurrent programs. In this paper, we report our experiences using ASF for implementing transactional memory. We have extended a C/C++ compiler to support language-level transactions and generate code that takes advantage of ASF. We use a software fallback mechanism for transactions that cannot be committed within ASF (e.g., because of hardware capacity limitations). Our evaluation uses a cycle-accurate x86 simulator that we have extended with ASF support. Building a complete ASF-based software stack allows us to evaluate the performance gains that a user-level program can obtain from ASF. Our measurements on a wide range of benchmarks indicate that the overheads traditionally associated with software transactional memories can be significantly reduced with the help of ASF. David Christie, Jae-Woong Chung, Stephan Diestelhorst, Michael Hohmuth, Martin Pohlack, Christof Fetzer, Martin Nowack, Torvald Riegel, Pascal Felber, Patrick Marlier, Etienne Rivière |
EuroSys | 5 |
| 2010 | ASF: AMD64 Extension for Lock-Free Data Structures and Transactional MemoryabstractAdvanced Synchronization Facility (ASF) is an AMD64 hardware extension for lock-free data structures and transactional memory. It provides a speculative region that atomically executes speculative accesses in the region. Five new instructions are added to demarcate the region, use speculative accesses selectively, and control the speculative hardware context. Programmers can use speculative regions to build flexible multi-word atomic primitives with no additional software support by relying on the minimum guarantee of available ASF hardware resources for lock-free programming. Transactional programs with high-level TM language constructs can either be compiled directly to the ASF code or be linked to software TM systems that use ASF to accelerate transactional execution. In this paper we develop an out-of-order hardware design to implement ASF on a future AMD processor and evaluate it with an in-house simulator. The experimental results show that the combined use of the L1 cache and the LS unit is very helpful for the performance robustness of ASF-based lock free data structures, and that the selective use of speculative accesses enables transactional programs to scale with limited ASF hardware resources. Jae-Woong Chung, Luke Yen, Stephan Diestelhorst, Martin Pohlack, Michael Hohmuth, David Christie, Dan Grossman |
MICRO | 4 |
| 2008 | Video quality and system resources: Scheduling two opponents
Michael Roitzsch, Martin Pohlack |
J. Vis. Commun. Image Represent. | 2 |
| 2007 | Enforceable component-based realtime contracts
Hermann Härtig, Steffen Zschaler, Martin Pohlack, Ronald Aigner, Steffen Göbel 0001, Christoph Pohl, Simone Röttger |
Real Time Syst. | 3 |
| 2006 | Principles for the Prediction of Video Decoding Times Applied to MPEG-1/2 and MPEG-4 Part 2 VideoabstractIn this paper, we present a method to predict per-frame decoding times of modern video decoder algorithms. By examining especially the MPEG-1, MPEG-2, and MPEG-4 pt. 2 algorithms, we developed a generic model for these decoders, which also applies to a wide range of other decoders. From this model, we derived a method to predict decoding times with an up-to-now unmatched accuracy while keeping the overhead low. We show the effectiveness of this method with an example implementation and compare the resulting predictions with the actual decoding times using video material from commercial DVDs Michael Roitzsch, Martin Pohlack |
RTSS | 2 |
| 2004 | The COMQUAD Component Container ArchitectureabstractComponent-based applications require runtime support to be able to guarantee non-functional properties. This paper proposes an architecture for a real-time-capable, component-based runtime environment, which allows to separate non-functional and functional concerns in component-based software development. The architecture is presented with particular focus on the real-time-non-real-time split of the runtime environment and the communication issues of respective component types and container parts. Steffen Göbel 0001, Christoph Pohl, Ronald Aigner, Martin Pohlack, Simone Röttger, Steffen Zschaler |
WICSA | 4 |
| 2003 | Rotational-Position-Aware Real-Time Disk Scheduling Using a Dynamic Active Subset (DAS)abstractScheduling disk requests with service guarantees has to bring the demand to meet guarantees in line with the need to optimize disk utilization. This paper presents the design, implementation, and experimental evaluation of a disk-scheduling framework which optimizes the disk utilization under the constraints of both hard and statistical service guarantees. The framework is based on two principles: 1) upon each scheduling decision, the calculation of a subset of the outstanding disk requests such that all service guarantees can be enforced under worst-case assumptions; and 2) the scheduling of this subset based on the rotational position of requests in order to improve the disk utilization. Results are presented through an implementation of the scheduling framework in DROPS, the Dresden real-time operating system. Lars Reuther, Martin Pohlack |
RTSS | 2 |