We investigate a new class of codes which is in a sense a hybrid between LDPC codes and turbo-codes. Some members of this new class have been shown to be asymptotically good and we conjecture that such a behavior holds for all classes of codes presented here. They all display excellent iterative decoding performances with no error floor at block error rates up to 10-6 for lengths of several thousand together with low average decoding complexity.

We investigate a new class of codes which is in some senses a hybrid between LDPC codes and turbo-codes. We show that when the parameters of this class are well chosen they have very good iterative decoding performances and at the same time a minimum distance which is typically linear in the code length

Several recent publications have shown that joint source-channel decoding could be a powerful technique to take advantage of residual source redundancy for fixed- and variable-length source codes. This letter gives an in-depth analysis of a low-complexity method recently proposed by Guivarch et al., where the redundancy left by a Huffman encoder is used at a bit level in the channel decoder to improve its performance. Several simulation results are presented, showing for two first-order Markov sources of different sizes that using a priori knowledge of the source statistics yields a significant improvement, either with a Viterbi channel decoder or with a turbo decoder.

A new coding construction scheme of block codes using short base codes and permutations that enables the construction of binary self-dual codes is presented in Cadic et al. (2001) and Carlach et al. (1999, 2000). The scheme leads to doubly-even (resp,. singly-even) self-dual codes provided the base code is a doubly-even self-dual code and the number of permutations is even (resp., odd). We study the particular case where the base code is the [8, 4, 4] extended Hamming. In this special case, we construct a new [88, 44, 16] extremal doubly-even self-dual code and we give a new unified construction of the five [32, 16, 8] extremal doubly-even self-dual codes.

Several publications have shown that joint source-channel decoding (JSCD) could be a powerful technique for taking advantage of residual source redundancy. Furthermore, it appeared that the principle could also be successfully applied to variable length codes (VLCs). This paper gives an in-depth analysis of a new method proposed by Guivarch, Carlach and Siohan (see Data Compression Conference (DCC), Snowbird, Utah, USA, Mar. 2000, p.83-92) and Guivarch, Siohan and Carlach (see International Communication Conference (ICT), Acapulco, Mexico, May 2000, p.872-76) to provide a low complexity soft decoding of VLCs with and without channel coding. Furthermore we also present new results obtained in a video coding context, using a VLC table from the MPEG4 video standard. Compared to separated decoding systems, the gain in signal to noise ratio varies from 0.3 dB up to 2 dB.

We present a new method for using a priori information at a bit level in the decoding of Huffman codes. Its basic principle is the computation and use of the bit probabilities derived from the symbol probabilities of Huffman codes. Thus, we obtain a joint source-channel decoding algorithm which takes advantage of this a priori knowledge. Even better performances are obtained when a turbo code-like iterative decoding is carried out. Compared to separate decoding systems, the gain in signal to noise ratio varies from 0.5 up to 1 dB with an added complexity which is relatively limited.

The circuit performs two-dimensional forward and inverse discrete cosine transform (DCT) on 8*8 blocks of data. Its implementation is based on the row-column decomposition scheme. A memory look-up approach combined with bit-serial structures is used to compute each one-dimensional DCT. A register-based transposition stage maintains the serial representation of the data after the first one-dimensional transform. This 50000-transistor circuit only uses read-only memories, registers, and adders. A pipeline architecture and a very regular layout lead to high-speed performances up to digital TV rates. The 32-pin version of the circuit accepts 9-bit pixel input and produces 12-bit coefficients in forward mode and vice-versa for inverse DCT mode. Its area is 26 mm/sup 2/ for a 1.2- mu m CMOS technology.>