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Xiulin Cui

dblp:421/2256 · DBLP profile ↗
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1ranked-venue papers
0as first author
1since 2021 · last 2025
0009-0005-2473-4310ORCID · reported

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 1 · 1 since 2021

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
1 paper
Emerging computing paradigms · 100%

Topics — the 3 heaviest of 3, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Emerging computing paradigms › quantum computer architecture
distributed quantum computing
0.912025
Optimizing Quantum Circuit Mapping to Reduce Inter-Module Communications in Distributed Architectures · SC 2025
Emerging computing paradigms
quantum computer architecture
0.912025
Optimizing Quantum Circuit Mapping to Reduce Inter-Module Communications in Distributed Architectures · SC 2025
Emerging computing paradigms › quantum computer architecture
qubit mapping
0.912025
Optimizing Quantum Circuit Mapping to Reduce Inter-Module Communications in Distributed Architectures · SC 2025

Methods — techniques the papers use, named apart from their topics

hierarchical mapping · 0.9gate teleportation · 0.9circuit segmentation · 0.9
YearPublicationVenuePosition
2025 Optimizing Quantum Circuit Mapping to Reduce Inter-Module Communications in Distributed Architectures
abstract
Modular quantum architectures have emerged as a promising solution for scalable quantum computing systems. Executing circuits in such distributed systems necessitates non-local operations between modules, incurring significant communication overhead. In this work, an optimized quantum circuit mapping technique called DQTetris is proposed to reduce inter-module communications. DQTetris employs a hierarchical framework that first seeks a global communication-free qubit mapping assignment under module capacity constraints. If infeasible, it searches for subcircuits with local communication-free qubit assignments via layer-wise gate pruning. Executing adjacent subcircuits with different qubit assignments incurs inter-module data teleportation. DQTetris minimizes these overheads by reducing qubit reassignment events through optimal circuit segmentation, qubit assignment selection, and adaptive gate teleportation. Experiments show that compared with existing methods, DQTetris can achieve average reductions in communication costs ranging from 28% to 75% across various benchmarks.
Longshan Xu, Edwin H.-M. Sha, Xiulin Cui, Qingfeng Zhuge
SC3