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Bruce Shepherd

dblp:426/1625 · DBLP profile ↗
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1ranked-venue papers
0as first author
1since 2021 · last 2025
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Applied, interdisciplinary, general and emerging computing · 1 · 1 since 2021

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
1 paper
Embedded and real-time systems · 62% Electronic design automation · 19% Parallel and multicore computing · 19%

Topics — the 6 heaviest of 6, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Parallel and multicore computing › dataflow computing
dataflow scheduling
0.912025
Faster, Exact, More General Response-Time Analysis for NVIDIA Holoscan Applications · RTSS 2025
Electronic design automation › timing analysis
end-to-end latency analysis
0.912025
Faster, Exact, More General Response-Time Analysis for NVIDIA Holoscan Applications · RTSS 2025
Embedded and real-time systems
real-time scheduling
0.912025
Faster, Exact, More General Response-Time Analysis for NVIDIA Holoscan Applications · RTSS 2025
Embedded and real-time systems › real-time scheduling › schedulability analysis
response time analysis
0.912025
Faster, Exact, More General Response-Time Analysis for NVIDIA Holoscan Applications · RTSS 2025
Embedded and real-time systems › model-based design › dataflow modeling
synchronous dataflow
0.912025
Faster, Exact, More General Response-Time Analysis for NVIDIA Holoscan Applications · RTSS 2025
Embedded and real-time systems
soft real-time systems
0.312025
Faster, Exact, More General Response-Time Analysis for NVIDIA Holoscan Applications · RTSS 2025

Methods — techniques the papers use, named apart from their topics

model checking · 0.9homogeneous synchronous dataflow graphs · 0.9
YearPublicationVenuePosition
2025 Faster, Exact, More General Response-Time Analysis for NVIDIA Holoscan Applications
abstract
We present a scalable method to compute exact worst-case end-to-end latency in applications built on the NVIDIA Holoscan SDK, a framework increasingly adopted for soft real-time ML workloads in medical devices, surgical instruments, and robotics. Holoscan applications are structured as directed acyclic graphs of non-preemptible task threads (operators) connected by FIFO queues, where execution depends not only on input availability but also on downstream buffer capacity - an atypical backpressure mechanism not captured by standard dataflow or middleware models. Existing analyses either lack convergence guarantees or rely on restrictive assumptions (e.g., fixed execution times, unit-sized buffers), resulting in overly conservative bounds. We show that Holoscan's scheduling semantics can be faithfully reduced to homogeneous synchronous dataflow graphs (HSDFGs), enabling exact end-to-end latency analysis. Building on this insight, we introduce a dynamic algorithm that computes tight upper bounds on response time across infinite input streams under variable task runtimes and arbitrary buffer sizes. We prove its correctness and convergence, and demonstrate that it outperforms HSDFG model checking with UPPAAL in runtime while avoiding the pessimism of prior Holoscan-specific analyses. Experiments on real Holoscan applications from NVIDIA HoloHub and large synthetic graphs confirm its scalability and precision.
Philip Schowitz, Shubhaankar Sharma, Siddharth Balodi, Soham Sinha 0001, Bruce Shepherd, Arpan Gujarati
RTSS5