Demo Data from VLDB 2026 / reviewers in the wild / expert
Taoteng Liao
dblp:428/0985
· DBLP profile ↗
1ranked-venue papers
0as first author
1since 2021 · last 2026
0009-0004-4453-8096ORCID · reported
Domains — the database's venue-derived domains; a paper can count in several
Systems, architecture and hardware · 1 · 1 since 2021
Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.
| Computer architecture, parallel and distributed computing, and storage systems
1 paper |
Memory systems · 100% | |
| Network and information security
1 paper |
Hardware security and side channels · 100% |
Topics — the 3 heaviest of 3, each with the papers that count most for it
| Topic | Weight | Papers | Last | Evidence papers |
|---|---|---|---|---|
Memory systems
oblivious RAM |
1.0 | 1 | 2026 | Path Weaver ORAM: Improving ORAM Throughput via Random Path Scheduling · IEEE Trans. Computers 2026 |
Memory systems
secure memory |
1.0 | 1 | 2026 | Path Weaver ORAM: Improving ORAM Throughput via Random Path Scheduling · IEEE Trans. Computers 2026 |
Hardware security and side channels › side-channel countermeasures
memory access pattern protection |
0.3 | 1 | 2026 | Path Weaver ORAM: Improving ORAM Throughput via Random Path Scheduling · IEEE Trans. Computers 2026 |
Methods — techniques the papers use, named apart from their topics
tail-widening · 2.0random-path scheduling · 2.0pipelined pseudorandom function · 2.0
| Year | Publication | Venue | Position |
|---|---|---|---|
| 2026 | Path Weaver ORAM: Improving ORAM Throughput via Random Path SchedulingabstractOblivious RAM (ORAM) hides memory access patterns but imposes high bandwidth and latency overheads. Prior work (e.g., Hitchhiker) introducedpath diversionto serve multiple logical requests in one traversal, yet diversion rarely triggers because it requires requests to lie on the same ancestor–descendant chain.We present Path Weaver, an ORAM that turns diversion into the common case viarandom-path scheduling. Instead of a rigid root-to-leaf path, each traversal selects one uniformly random bucket per level; the controller then “stitches” per-level picks so different outstanding requests can be satisfied at different levels of thesametraversal. ATail-Wideningscheme fetches a few additional buckets at the dense bottom levels, substantially increasing match opportunities with constant overhead. To keep hardware small, Path Weaver uses a compact position map and regenerates per-level choices on the fly with a pipelined pseudorandom function (PRF) overlapped with DRAM access; we micro-profile these stages to quantify their cost. The design targets random-access main memory (DRAM) and requires no changes to the software stack.Path Weaver preserves the Path-style invariant of one legitimate bucket per level, thereby retaining indistinguishability and the same stash-overflow guarantees as Path ORAM. Evaluated in gem5 on SPEC CPU 2017, Path Weaver processes 2.32× more requests per traversal than Hitchhiker, reduces single-core ORAM latency by 2.1×, and accelerates four-core workloads by 3.3×. By making path diversion a core architectural feature, Path Weaver brings ORAM significantly closer to practical, ’deployonce” secure memory. Taoteng Liao, Yanlong Wen |
IEEE Trans. Computers | 2 |