VLDB 2026 Research / reviewers in the wild / expert
Sudakshina Dutta
dblp:43/11032
· DBLP profile ↗
6ranked-venue papers
6as first author
2since 2021 · last 2024
0000-0001-9327-9677ORCID · corroborated
Domains — the database's venue-derived domains; a paper can count in several
Software engineering, systems software and programming languages · 4 · 4 first-author · 2 since 2021Artificial intelligence and machine learning · 1 · 1 first-authorSystems, architecture and hardware · 1 · 1 first-author
| Year | Publication | Venue | Position |
|---|---|---|---|
| 2024 | Localizing faults using verification technique
Sudakshina Dutta |
J. Syst. Softw. | 1 |
| 2022 | Locating Code Omission Error due to Incorrect Polymorphic Method CallabstractDynamic program slicing methods are widely used for debugging because many statements can be ignored in the process of localizing a bug. A dynamic program slice for a variable contains only those statements that influenced this variable. One limitation of dynamic slicing-based techniques is that they cannot capture execution omission errors, which may cause the execution of certain critical statements in a program to be omitted and thus result in failures. In this paper, we propose a solution to locate execution omission errors by using dynamic slices for a variable in the presence of methods that are virtual in Java programs. Note that any method which is not a static, private or final method can be considered a virtual method in a Java program. Due to the assignment of objects of wrong derived classes to base class reference, some different versions of polymorphic methods can be called which may cause failure. We designed a slicing method called polymorphic relevant slice which can be used to force the execution of the omitted code by initializing objects of all possible classes derived from the same base class with the available data, assigning them to base class reference one-by-one and switch execution for all alternative virtual functions to check if any of them meets specification. We have used a system dependence graph to identify all the derived class objects which could have been assigned to the base class reference. Sudakshina Dutta, Debarshi Kumar Sanyal |
ICST | 1 |
| 2017 | Validation of parallelizing transformations of sequential programsabstractSummary Transformations for high‐performance superscalar, vector, and parallel processors maximize parallelism and memory locality. Often parallelizing compilers apply transformations, such as loop parallelization and loop vectorization, to convert a sequential array‐handling program into a parallel program. Validation of such transformations is extremely useful in the prevalent high‐performance computing environment. This paper proposes a novel algorithm for construction of the dependence graph of the generated parallel programs. These transformations are validated by checking equivalence of the dependence graphs of the original sequential program and the transformed parallel program using a standard algorithm reported in the literature. The above equivalence checker works even when the above parallelizing transformations are preceded by various enabling transformations except for loop collapsing transformation that changes the dimensions of the arrays. In the present paper, the scope of the equivalence checker has been expanded to handle this special case by informing it of the correspondence between the index spaces of the corresponding of input and output arrays in the sequential and the parallel programs. The proposed methods are implemented and tested against a set of available benchmark programs that are parallelized by the polyhedral auto‐parallelizer LooPo and the auto‐vectorizer Scout. Sudakshina Dutta |
Concurr. Comput. Pract. Exp. | 1 |
| 2016 | An Enhanced Equivalence Checking Method to Handle Bugs in Programs with RecurrencesabstractSoftware designers often apply automatic or manual transformations on the array-handling source programs to improve performance of the target programs. Verdoolaege et al. (Verdoolaege et al., 2012) have proposed a method to automatically prove equivalence of the output arrays of the source and the generated transformed programs. Unlike the other approaches, the method of (Verdoolaege et al., 2012) provides the most sophisticated techniques to validate programs with non-uniform recurrences besides programs with uniform recurrences. However, if the recurrence expressions of the source and the transformed programs refer to more than one base cases of which some are non-equivalent and also if the domain of the output arrays partition based on
dependences on different base cases, then some imprecision in the equivalence checking results is observed. The equivalence checker reports that the entire index spaces of the output arrays of the source program to be non-equivalent with that of the transformed program instead of the portion of the output arrays which depend on the non-equivalent base cases of the programs. In the current work, we have enhanced the method of equivalence checking of (Verdoolaege et al., 2012) so that it can precisely indicate the equivalent and non-equivalent portions of the output arrays. Sudakshina Dutta, Dipankar Sarkar 0001 |
ENASE | 1 |
| 2016 | Validation of Loop Parallelization and Loop Vectorization TransformationsabstractLoop parallelization and loop vectorization of array-intensive programs are two common transformations applied by parallelizing compilers to convert a sequential program into a parallel program. Validation of such transformations carried out by untrusted compilers are extremely useful. This paper proposes a novel algorithm for construction of the dependence graph of the generated parallel programs. The transformations are then validated by checking equivalence of the dependence graphs of the original sequential program and the parallel program using a standard and fairly general algorithm reported elsewhere in the literature. The above equivalence checker still works even when the above parallelizing transformations are preceded by various enabling transformations except for loop collapsing which changes the dimensions of the arrays. To address the issue, the present work expands the scope of the checker to handle this special case by informing it of the correspondence between the index spaces of the corresponding arrays in the sequential and the parallel programs. The augmented algorithm is able to validate a large class of static affine programs. The proposed methods are implemented and tested against a set of available benchmark programs which are parallelized by the polyhedral auto-parallelizer LooPo and the auto-vectorizer Scout. During experiments, a bug of the compiler LooPo on loop parallelization has been detected. Sudakshina Dutta, Dipankar Sarkar 0001, Arvind Rawat |
ENASE | 1 |
| 2012 | A Cognitive Approach to Word Sense Disambiguation
Sudakshina Dutta, Anupam Basu |
CICLing (1) | 1 |