Demo Data from VLDB 2026 / reviewers in the wild / expert
Corrado Pedron
dblp:43/3893
· DBLP profile ↗
1ranked-venue papers
1as first author
0since 2021 · last 1988
—ORCID · none
Domains — the database's venue-derived domains; a paper can count in several
Systems, architecture and hardware · 1 · 1 first-author
Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.
| Computer architecture, parallel and distributed computing, and storage systems
1 paper |
Electronic design automation · 70% Integrated circuit design · 30% |
Topics — the 4 heaviest of 4, each with the papers that count most for it
| Topic | Weight | Papers | Last | Evidence papers |
|---|---|---|---|---|
Integrated circuit design
digital circuit design |
0.0 | 1 | 1988 | Analysis and synthesis of combinational pass transistor circuits · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 1988 |
Electronic design automation
logic synthesis |
0.0 | 1 | 1988 | Analysis and synthesis of combinational pass transistor circuits · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 1988 |
Electronic design automation › logic synthesis › combinational logic synthesis
pass-transistor logic synthesis |
0.0 | 1 | 1988 | Analysis and synthesis of combinational pass transistor circuits · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 1988 |
Electronic design automation › logic synthesis
logic optimization |
0.0 | 1 | 1988 | Analysis and synthesis of combinational pass transistor circuits · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 1988 |
Methods — techniques the papers use, named apart from their topics
synthesis algorithm · 0.0circuit analysis · 0.0
| Year | Publication | Venue | Position |
|---|---|---|---|
| 1988 | Analysis and synthesis of combinational pass transistor circuitsabstractA method for analyzing a wide range of CMOS pass transistor circuits is presented. Based on concepts derived from analysis, synthesis algorithms are proposed. They have been implemented as a program called PAVOS which can solve relatively complex problems. A manual method is presented for handling simpler ones. An effective minimization of the circuit area is obtained by using incomplete transmission gates, i.e. gates composed of either PMOS or NMOS transistors, without degrading the circuit output signals. The specification or a circuit can contain high-impedance states and attractive don't-cares called don't-happen states. It is shown that well-known good-pass transistor circuits, which synthesize results from designers' experience and intuition, can easily be obtained with the described methods. It is suggested that synthesis algorithms for all kinds of logics can be obtained by making small modifications on PAVOS.> Corrado Pedron, André Stauffer |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. | 1 |