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Zipeng Ouyang

dblp:430/6684 · DBLP profile ↗
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1ranked-venue papers
0as first author
1since 2021 · last 2026
0009-0001-8238-5789ORCID · reported

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 1 · 1 since 2021

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
1 paper
Distributed systems · 62% Memory systems · 38%

Topics — the 3 heaviest of 3, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Distributed systems › concurrency control
distributed lock management
1.012026
CXLock: Efficient and Scalable Lock Management for CXL-Enabled Distributed Systems · IEEE Trans. Computers 2026
Memory systems › memory interconnect
CXL
0.312026
CXLock: Efficient and Scalable Lock Management for CXL-Enabled Distributed Systems · IEEE Trans. Computers 2026
Memory systems › memory management
memory sharing
0.312026
CXLock: Efficient and Scalable Lock Management for CXL-Enabled Distributed Systems · IEEE Trans. Computers 2026

Methods — techniques the papers use, named apart from their topics

software-based coherency · 1.0manager-side arbitration · 1.0client-side queuing · 1.0
YearPublicationVenuePosition
2026 CXLock: Efficient and Scalable Lock Management for CXL-Enabled Distributed Systems
abstract
Efficient lock management is critical in distributed systems with shared resources, especially in the context of enhanced computational power and reduced processing time. While numerous studies have leveraged Remote Direct Memory Access (RDMA) for distributed locking, these network-based approaches suffer from high network latency and jitter. The emergence of the Compute Express Link (CXL) protocol provides high-speed, low-latency connections between host processors and memory devices, presenting a compelling alternative for the lock system design. This paper introduces CXLock, the industry’s first distributed lock management system based on CXL 2.0 switches. CXLock decouples lock management into client-side queuing and manager-side arbitration, resolving race conditions of multiple clients without using remote atomics. To handle the lack of hardware-enforced coherency in CXL 2.0, CXLock employs a software-based coherency model that enables memory sharing across multiple hosts with cacheable and write-back attributes. CXLock is implemented and evaluated on a real rack-scale hardware platform containing a CXL switch and multiple host nodes. The results show that CXLock delivers an average throughput improvement of 3.7× over the RDMA-based solutions. Moreover, CXLock reduces the lock grant latency by up to 76% in both contention-free and contended scenarios.
Yudi Qiu, Qixiao Liu, Wenpu Hu, Xinjun Yang, Yingqiang Zhang, Hao Chen 0080, Zipeng Ouyang, Yuemin Wu
IEEE Trans. Computers10