Helin Zheng

dblp:432/6328 · DBLP profile ↗
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1ranked-venue papers
0as first author
1since 2021 · last 2026
0009-0005-6879-0648ORCID · reported

Domains — the database's venue-derived domains; a paper can count in several

Databases, data management, data science and information retrieval · 1 · 1 since 2021Applied, interdisciplinary, general and emerging computing · 1 · 1 since 2021

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
1 paper
Hardware accelerators and domain-specific architectures · 40% Distributed systems · 20% Embedded and real-time systems · 20%

Topics — the 5 heaviest of 5, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Distributed systems
edge computing
1.012026
MASI: Memory-Adaptive Inference Framework for Spiking Neural Networks on Edge Devices · WWW 2026
Hardware accelerators and domain-specific architectures › machine learning accelerator
neural network accelerator
1.012026
MASI: Memory-Adaptive Inference Framework for Spiking Neural Networks on Edge Devices · WWW 2026
Embedded and real-time systems
on-device inference
1.012026
MASI: Memory-Adaptive Inference Framework for Spiking Neural Networks on Edge Devices · WWW 2026
Hardware accelerators and domain-specific architectures › machine learning accelerator › neural network accelerator
spiking neural network accelerator
1.012026
MASI: Memory-Adaptive Inference Framework for Spiking Neural Networks on Edge Devices · WWW 2026
Emerging computing paradigms › neuromorphic computing
spiking neural network inference
1.012026
MASI: Memory-Adaptive Inference Framework for Spiking Neural Networks on Edge Devices · WWW 2026

Methods — techniques the papers use, named apart from their topics

memory-adaptive scheduling · 1.0early exit · 1.0
YearPublicationVenuePosition
2026 MASI: Memory-Adaptive Inference Framework for Spiking Neural Networks on Edge Devices
abstract
The rapid development of the Internet of Things (IoT) applications necessitates resource-efficient computing paradigms that can unify heterogeneous sensing modalities. Spiking Neural Networks (SNNs) meet this need with their event-driven and energy-efficient processing nature. However, deploying SNNs on mobile and embedded platforms is hindered by strict and fluctuating memory budgets. While prior work explores lightweight model design and system-level memory management, these methods either sacrifice accuracy or incur high runtime overhead due to timestep-dependent dynamics. To tackle these challenges, we propose a memory-adaptive framework MASI that enables efficient on-device SNN inference by combining (1) a fine-grained memory-adaptive layer slicing strategy, (2) a timestep-agnostic scheduler that maximizes memory utilization with minimal fragmentation, and (3) a timestep-aware early-exit mechanism that reduces redundant calculations. Evaluated on diverse workloads and edge devices, MASI can dynamically adapt to runtime memory availability, approximately reducing memory usage by 20.67% and inference latency by 58.53% on average with negligible accuracy loss compared to other feasible on-device implementations under memory constraints.
Di Yu 0001, Helin Zheng, Changze Lv, Xin Du 0002, Linshan Jiang, Xiang Liu 0017, Gang Pan 0001, Shuiguang Deng
WWW2