Demonstration venue · read-only. Every page can be browsed; the buttons that would change it are switched off. Create an account to run TaxoReview on your own data. A simulation from public publication records: the people listed were not invited and did not agree to review.
? Tutorial for this page

Umayrah Chonee

dblp:435/8783 · DBLP profile ↗
← Back
1ranked-venue papers
0as first author
1since 2021 · last 2026
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Computer networks · 1 · 1 since 2021

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
1 paper
Memory systems · 67% Hardware accelerators and domain-specific architectures · 33%

Topics — the 3 heaviest of 4, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Hardware accelerators and domain-specific architectures › domain-specific accelerator › data processing accelerator
data processing unit
1.012026
PD3: Prefetching Data with DPUs for Disaggregated Memory · NSDI 2026
Memory systems
memory disaggregation
1.012026
PD3: Prefetching Data with DPUs for Disaggregated Memory · NSDI 2026
Memory systems › cache
prefetching
1.012026
PD3: Prefetching Data with DPUs for Disaggregated Memory · NSDI 2026
YearPublicationVenuePosition
2026 PD3: Prefetching Data with DPUs for Disaggregated Memory
Sidharth Sankhe, Felix Zhang, Umayrah Chonee, Sherman Lim, Jiasheng Hu, Jialin Li 0001, Qizhen Zhang 0001
NSDI3