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Madihally J. Narasimha

dblp:44/11154 · DBLP profile ↗
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18ranked-venue papers
11as first author
0since 2021 · last 2007
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Computer networks · 9 · 5 first-authorGraphics, computer vision, multimedia, augmented reality and games · 9 · 6 first-author

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer networks
4 papers
Physical-layer communications · 100%
Computer architecture, parallel and distributed computing, and storage systems
3 papers
Interconnection networks and networks-on-chip · 100%

Topics — the 17 heaviest of 17, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Physical-layer communications
synchronization
0.021997
Design of optimal interpolation filter for symbol timing recovery · IEEE Trans. Commun. 1997
Unbiased timing-error estimation in the presence of nonideal interpolation · IEEE Trans. Commun. 1997
Interconnection networks and networks-on-chip
switching network
0.031994
A recursive concentrator structure with applications to self-routing switching networks · IEEE Trans. Commun. 1994
Comments on "Nonblocking property of reverse banyan networks" · IEEE Trans. Commun. 1994
The Batcher-banyan self-routing network: universality and simplification · IEEE Trans. Commun. 1988
Physical-layer communications › signal processing for communications › filter design
interpolation filter design
0.011997
Design of optimal interpolation filter for symbol timing recovery · IEEE Trans. Commun. 1997
Physical-layer communications › synchronization
timing recovery
0.011997
Design of optimal interpolation filter for symbol timing recovery · IEEE Trans. Commun. 1997
Interconnection networks and networks-on-chip › switching network
concentrator
0.011994
A recursive concentrator structure with applications to self-routing switching networks · IEEE Trans. Commun. 1994
Interconnection networks and networks-on-chip › permutation network
reverse banyan network
0.011994
Comments on "Nonblocking property of reverse banyan networks" · IEEE Trans. Commun. 1994
Interconnection networks and networks-on-chip › switching network
self-routing network
0.011994
A recursive concentrator structure with applications to self-routing switching networks · IEEE Trans. Commun. 1994
Physical-layer communications › receiver design › radio receiver design
digital receivers
0.021997
Design of optimal interpolation filter for symbol timing recovery · IEEE Trans. Commun. 1997
Unbiased timing-error estimation in the presence of nonideal interpolation · IEEE Trans. Commun. 1997
Physical-layer communications › digital signal processing
interpolation
0.011997
Unbiased timing-error estimation in the presence of nonideal interpolation · IEEE Trans. Commun. 1997
Physical-layer communications
receiver design
0.011997
Design of optimal interpolation filter for symbol timing recovery · IEEE Trans. Commun. 1997
Interconnection networks and networks-on-chip › permutation network
batcher-banyan network
0.011988
The Batcher-banyan self-routing network: universality and simplification · IEEE Trans. Commun. 1988
Interconnection networks and networks-on-chip › routing algorithms
self-routing
0.011988
The Batcher-banyan self-routing network: universality and simplification · IEEE Trans. Commun. 1988
Physical-layer communications
signal processing for communications
0.021982
Design of FIR Filter Banks for a 24-Channel Transmultiplexer · IEEE Trans. Commun. 1982
On the Computation of the Discrete Cosine Transform · IEEE Trans. Commun. 1978
Physical-layer communications › digital signal processing › filter bank
filter bank design
0.011982
Design of FIR Filter Banks for a 24-Channel Transmultiplexer · IEEE Trans. Commun. 1982
Physical-layer communications › signal processing for communications
transmultiplexer
0.011982
Design of FIR Filter Banks for a 24-Channel Transmultiplexer · IEEE Trans. Commun. 1982
Interconnection networks and networks-on-chip › switching network › multistage interconnection network
banyan network
0.011988
The Batcher-banyan self-routing network: universality and simplification · IEEE Trans. Commun. 1988
Physical-layer communications › signal processing for communications
discrete fourier transform
0.011978
On the Computation of the Discrete Cosine Transform · IEEE Trans. Commun. 1978

Methods — techniques the papers use, named apart from their topics

simulation · 0.0mean-square error minimization · 0.0linear equation solving · 0.0bias estimation · 0.0recursive decomposition · 0.0permutation realization · 0.0inverse omega network · 0.0bitonic sorting · 0.0binary radix sorting · 0.0minimum phase design · 0.0frequency sampling · 0.0complex cepstrum · 0.0DFT-based computation · 0.0
YearPublicationVenuePosition
2007 Block Adaptive Filter With Time-Domain Update Using Three Transforms
abstract
Implementation of real signal block adaptive filters with time-domain update using three fast Fourier transforms (FFTs) is delineated. The reduction from five to three FFTs is achieved by combining the required convolution and correlation operations into a single complex filtering process. The proposed method requires fewer additions than the conventional five FFT solution. It also has a more elegant architecture that is simpler to implement in hardware or software
Madihally J. Narasimha
IEEE Signal Process. Lett.1
2007 Linear Convolution Using Skew-Cyclic Convolutions
abstract
It is shown that the linear convolution required in block filtering can be decomposed into a sum of skew-cyclic convolutions. Such convolutions can be realized efficiently with half-length complex transforms when the signals are real. This method results in computational savings over the traditional overlap-add and overlap-save algorithms. It is also more economical than fast parallel finite impulse response (FIR) filter structures for longer filter lengths
Madihally J. Narasimha
IEEE Signal Process. Lett.1
2006 Modified Overlap-Add and Overlap-Save Convolution Algorithms for Real Signals
abstract
Modified overlap-save and overlap-add algorithms for filtering a real signal by an N-tap finite impulse response filter are delineated. These algorithms compute two N-sample output blocks simultaneously at every processing step using 2N-point transforms, while the traditional methods compute only one N-sample block with the same length transforms. They achieve streamline processing for real signals but incur an additional delay of N samples
Madihally J. Narasimha
IEEE Signal Process. Lett.1
2003 Finite-channel chromatic derivative filter banks
abstract
Two previous contributions discussed the theory of perfect-reconstruction (PR) chromatic derivative filter banks comprising an infinite number of channels. This paper extends the theory to the case of finite channels. A novel time domain procedure is delineated for designing the synthesis filters that achieve PR in this case.
Mike Cushman, Madihally J. Narasimha, P. P. Vaidyanathan
IEEE Signal Process. Lett.2
2002 Chromatic derivative filter banks
abstract
A new contribution to generalized sampling of bandlimited signals based on the so-called chromatic derivative operators was recently introduced by Ignjatovic (see Kromos Technology, Los Altos, CA. [Online] Tech. Rep. 1, 2001). Chromatic derivatives are linear combinations of the ordinary derivatives, where the coefficients of the combination are derived from orthogonal polynomial theory. This article describes the connection between these operators and the well-established ideas of perfect reconstruction and biorthogonality in analog filter banks.
Madihally J. Narasimha, Aleksandar Ignjatovic, P. P. Vaidyanathan
IEEE Signal Process. Lett.1
2000 Maximizing system capacity in a sub-symbol based DS-CDMA multiuser detector
abstract
A sub-symbol based multiuser detector for DS-CDMA systems was proposed in Uzmi and Mujtaba (1999). This paper addresses the optimization of such detectors to maximize the system capacity. It is shown that the maximum number of simultaneous users supported in a DS-CDMA system using a sub-symbol scheme can be increased by the proper selection of certain thresholds delineated in Uzmi and Mujtaba, and by imposing moderate synchronization requirements on the transmitters. It is also shown that, in a synchronized environment, performing with only one sub-symbol is enough for accommodating a fairly large number of users, if the system signal to noise ratio (SNR) is medium to high. It has been verified through simulations that the maximum number of simultaneous users depends on the degree of synchronism and is approximately given by the number of chips in the longest sub-symbol.
Zartash Afzal Uzmi, Madihally J. Narasimha
GLOBECOM2
1997 Unbiased timing-error estimation in the presence of nonideal interpolation
abstract
We propose a method to eliminate the bias term present in the timing-error estimator employed in digital receivers where the input signal is sampled by a fixed clock which is not synchronized to the transmitter clock. This bias error results from the nonideal interpolation that precedes the timing-error estimator. We show that it can be derived as a function of the previously estimated symbol timings. An unbiased timing-error estimate can then be obtained by subtracting this bias term from the output of the timing-error detector. Simulation results are included to show the performance improvement realizable by employing this method.
Daeyoung Kim 0006, Madihally J. Narasimha, Donald C. Cox
IEEE Trans. Commun.2
1997 Design of optimal interpolation filter for symbol timing recovery
abstract
We propose an optimal interpolation filter for symbol timing recovery in a digital receiver where the input analog-to-digital (A-D) conversion sampling clock is not synchronized to the transmitter symbol clock. The optimal filter is designed by minimizing the mean-square error (MSE) at the output of the receiver, assuming that the correct timing difference between the nonsynchronized input samples and the correct strobe synchronized to the symbol is given. The MSE minimization procedure results in a system of linear equations which can easily be solved to yield the optimal filter coefficients. We also analyze the symbol tracking performance of a symbol synchronizer that employs the proposed optimal interpolation filter. Although the proposed optimal filter is designed assuming the availability of the correct timing difference, we show that it minimizes the timing estimation error variance even when the computed timing difference values deviate from the ideal, we also show that the timing estimation is virtually unbiased if the length of the interpolation filter is greater than or equal to 4. Simulation results are included to show the performance improvement realizable by employing the optimal interpolation filter.
Daeyoung Kim 0006, Madihally J. Narasimha, Donald C. Cox
IEEE Trans. Commun.2
1996 An improved single frequency estimator
abstract
A new method for estimating the frequency of a complex sinusoid in complex white Gaussian noise is proposed. Its computational complexity is comparable to Kay's method [1989], but it attains the Cramer-Rao bound (CRB) down to lower signal-to-noise ratio (SNR) values. Simulation results are included to demonstrate the performance of the proposed method.
Daeyoung Kim 0006, Madihally J. Narasimha, Donald C. Cox
IEEE Signal Process. Lett.2
1994 Comments on "Nonblocking property of reverse banyan networks"
abstract
It is shown that the nonblocking property of reverse banyan networks mentioned in the above paper follows directly from the fact that banyan networks can realize permutations characterized by bitonic sequences.>
Madihally J. Narasimha
IEEE Trans. Commun.1
1994 A recursive concentrator structure with applications to self-routing switching networks
abstract
A technique for constructing an N-input concentrator from two (N/2)-input concentrators and a stage of 2/spl times/2 switching elements is described. Recursive decomposition of each of the (N/2)-input concentrators yields a log/sub 2/N-stage switching network similar in topology to the inverse omega network. The control algorithm for setting the switching elements is shown to be a simple logic function of the activity bits of the inputs. An iterative cell that combines the functions of the control logic and the 2/spl times/2 switching element can be used as a building block to realize the entire concentrator. Applications of the concentrator structure as an interconnection fabric in fast packet switching is explored. This leads to an efficient self-routing network, similar in topology to the transposed Batcher-banyan network.>
Madihally J. Narasimha
IEEE Trans. Commun.1
1988 The Batcher-banyan self-routing network: universality and simplification
abstract
It is shown that the Batcher-banyan network performs as a universal self-routing switch when inputs with unassigned destinations are present. This is demonstrated by first proving that banyan networks can realize permutations represented by bitonic sequences, and then noting that the sorted output of the Batcher network can be viewed as a bitonic sequence. Two methods are proposed for reducing the complexity of the Batcher-banyan network. In the first method, one stage of the banyan network is eliminated by assigning proper destination tags to the unassigned inputs. In the second, a self-routing switch based on the binary-radix sorting scheme is shown to be more economical for a small number of lines.>
Madihally J. Narasimha
IEEE Trans. Commun.1
1984 Guest Editorial
David G. Messerschmitt, Madihally J. Narasimha, Bhagwati Prasad Agrawal
IEEE J. Sel. Areas Commun.2
1982 Design of FIR Filter Banks for a 24-Channel Transmultiplexer
abstract
The design of a bank of FIR bandpass filters for channel filtering and sample rate alteration in a 24-channel transmultiplexer is considered. It is shown that such a filter bank can be realized by the combination of a weighting network and a discrete cosine transform. A minimum phase design is suggested for the low-pass prototype filter in order to solve the long absolute delay problem inherent in linear phase filters. Two approaches to the design of long minimum phase filters are disclosed; one employs frequency sampling design techniques, and the other makes use of the properties of the complex cepstrum of a minimum phase sequence. Filter specifications for the low-pass prototype are discussed and a design example is included. The hardware realization of the filter bank using a multiplier-accumulator as the arithmetic element is also discussed.
Madihally J. Narasimha
IEEE Trans. Commun.1
1978 A simple hardware implementation of digital notch filters
abstract
Narrow band digital notch filters have their poles near the unit circle. As the sampling rate is increased, the poles move towards z = +1. Implementing such filters requires long registers to overcome the sensitivity and roundoff errors. A filter structure based on digital incremental computers is proposed, which has low sensitivity and roundoff errors, and simple hardware implementation. The filter structure can be directly used on differentially pulse-code modulated signals. Hard-ware multipliers are not required as the poles approach z = +1, and excellent results can be obtained using multipliers with very short word lengths, or with small size read-only memories.
Ahmad I. Abu-El-Haija, Madihally J. Narasimha, Allen M. Peterson
ICASSP2
1978 Design and applications of uniform digital bandpass filter banks
abstract
A digital bandpass filter-bank for demodulating a wideband frequency multiplexed signal into a specified number of uniform narrow band channel outputs, and conversely for modulating a set of channel inputs into a composite frequency multiplexed signal, can be realized efficiently by the combination of a suitable transform processor and a weighting network. The design and implementation of these filter-banks for different types of input-ouput configurations such as complex signals at both the wideband and narrow band sides, real signal at the wideband side and complex signals at the narrow band side, and real signals at both ends are discussed. Applications in telecommunications (TDM-FDM translators), speech processing (phase vocoders), signal analysis and detection (spectrum analyzers) and other signal processing systems are also described.
Madihally J. Narasimha, Allen M. Peterson
ICASSP1
1978 On the Computation of the Discrete Cosine Transform
abstract
AnN-point discrete Fourier transform (DFT) algorithm can be used to evaluate a discrete cosine transform by a simple rearrangement of the input data. This method is about two times faster compared to the conventional method which uses a2N-point DFT.
Madihally J. Narasimha, Allen M. Peterson
IEEE Trans. Commun.1
1976 Quadratic residues: Application to chirp filters and discrete Fourier transforms
abstract
A complete solution is given to the problem of finding the number of distinct quadratic residues for a composite modulus. Two specific applications of this result are described. The first one concerns the efficient implementation of chirp filters. It is shown that by an optimum choice of the number of taps, the number of multiplications required to realize a transversal chirp filter can be greatly reduced. Secondly, an algorithm for the computation of DFT, based on chirp filtering, is discussed. It has the potential of being faster than the FFT in certain cases and, in addition, requires less storage for the sine-cosine values.
Madihally J. Narasimha, Kishan Shenoi, Allen M. Peterson
ICASSP1