Demo Data from VLDB 2026 / reviewers in the wild / expert
Stuart Kolodner
dblp:44/4143
· DBLP profile ↗
1ranked-venue papers
0as first author
0since 2021 · last 1985
—ORCID · none
Domains — the database's venue-derived domains; a paper can count in several
Software engineering, systems software and programming languages · 1
Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.
| Software engineering, system software, and programming languages
1 paper |
Compilers and program optimization · 100% | |
| Computer architecture, parallel and distributed computing, and storage systems
1 paper |
Performance modeling and evaluation · 100% |
Topics — the 3 heaviest of 3, each with the papers that count most for it
| Topic | Weight | Papers | Last | Evidence papers |
|---|---|---|---|---|
Compilers and program optimization › parsing
parallel parsing |
0.0 | 1 | 1985 | Estimating the Speedup in Parallel Parsing · IEEE Trans. Software Eng. 1985 |
Compilers and program optimization
parsing |
0.0 | 1 | 1985 | Estimating the Speedup in Parallel Parsing · IEEE Trans. Software Eng. 1985 |
Performance modeling and evaluation › performance prediction
speedup estimation |
0.0 | 1 | 1985 | Estimating the Speedup in Parallel Parsing · IEEE Trans. Software Eng. 1985 |
Methods — techniques the papers use, named apart from their topics
simulation · 0.0analytical modeling · 0.0
| Year | Publication | Venue | Position |
|---|---|---|---|
| 1985 | Estimating the Speedup in Parallel ParsingabstractA model for the operation of bottom-up parallel parsing using asynchronous processors is proposed. The model is based on an extension of shift-reduce parsers which are able to merge the information they keep on their stacks. The main objective of the paper is to provide estimates of the speedup attainable when using the proposed model. Three programs were written to measure the speedup. The first is a classical simulator which keeps track of the times spent performing the shift, reduce, and merge operations for each processor. The second is a program which generates "typical" strings in a language and simultaneously keeps track of the number of operations needed to parse the generated strings. The third is a program capable of deducing the num-ber of parsing operations by counting the number of selected terminals appearing in an input string. The results, applicable to the paralel parsing of programs written in a Pascal-like language, show how the speedup varies with the number of processors for different ratios of the times to shift, reduce, and merge. Although the speedup falls considerably below that predicted by theory, substantial gains are still attainable by using a fairly large number of parallel processors. With the decreasing costs of processors, parallel parsing and parallel compilation will become increasingly important and should allow considerable gains in speedup. Jacques Cohen, Stuart Kolodner |
IEEE Trans. Software Eng. | 2 |