Hervé Marchand

dblp:44/4811 · DBLP profile ↗
← Back
22ranked-venue papers
6as first author
0since 2021 · last 2019
0000-0002-0138-2499ORCID · corroborated

Domains — the database's venue-derived domains; a paper can count in several

Software engineering, systems software and programming languages · 12 · 2 first-authorTheory of computation · 7Applied, interdisciplinary, general and emerging computing · 4 · 3 first-authorHuman-computer interaction and ubiquitous computing · 3 · 3 first-author

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Software engineering, system software, and programming languages
2 papers
Software testing · 64% Program verification · 36%
Computer architecture, parallel and distributed computing, and storage systems
1 paper
Embedded and real-time systems · 100%

Topics — the 7 heaviest of 8, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Software testing › specification-based testing
conformance testing
0.122007
Integrating formal verification and conformance testing for reactive systems · IEEE Trans. Software Eng. 2007
Automatic Verification and Conformance Testing for Validating Safety Properties of Reactive Systems · FM 2005
Program verification
model checking
0.112007
Integrating formal verification and conformance testing for reactive systems · IEEE Trans. Software Eng. 2007
Program verification
reactive system verification
0.112007
Integrating formal verification and conformance testing for reactive systems · IEEE Trans. Software Eng. 2007
Software testing › test generation
specification-based test generation
0.112007
Integrating formal verification and conformance testing for reactive systems · IEEE Trans. Software Eng. 2007
Software testing
model-based testing
0.112005
Automatic Verification and Conformance Testing for Validating Safety Properties of Reactive Systems · FM 2005
Embedded and real-time systems › control systems
controller synthesis
0.012000
Incremental Design of a Power Transformer Station Controller Using a Controller Synthesis Methodology · IEEE Trans. Software Eng. 2000
Embedded and real-time systems
synchronous programming
0.012000
Incremental Design of a Power Transformer Station Controller Using a Controller Synthesis Methodology · IEEE Trans. Software Eng. 2000

Methods — techniques the papers use, named apart from their topics

symbolic test generation · 0.1input-output automata · 0.1polynomial dynamical systems · 0.1conformance testing · 0.1automatic verification · 0.1algebraic techniques · 0.0algebraic technique · 0.0
YearPublicationVenuePosition
2019 Optimal enforcement of (timed) properties with uncontrollable events
abstract
This paper deals with runtime enforcement of untimed and timed properties with uncontrollable events. Runtime enforcement consists in defining and using mechanisms that modify the executions of a running system to ensure their correctness with respect to a desired property. We introduce a framework that takes as input any regular (timed) property described by a deterministic automaton over an alphabet of events, with some of these events being uncontrollable. An uncontrollable event cannot be delayed nor intercepted by an enforcement mechanism. Enforcement mechanisms should satisfy important properties, namely soundness, compliance and optimality – meaning that enforcement mechanisms should output as soon as possible correct executions that are as close as possible to the input execution. We define the conditions for a property to be enforceable with uncontrollable events. Moreover, we synthesise sound, compliant and optimal descriptions of runtime enforcement mechanisms at two levels of abstraction to facilitate their design and implementation.
Matthieu Renard, Yliès Falcone, Antoine Rollet, Thierry Jéron, Hervé Marchand
Math. Struct. Comput. Sci.5
2017 Predictive runtime enforcement
Srinivas Pinisetty, Viorel Preoteasa, Stavros Tripakis, Thierry Jéron, Yliès Falcone, Hervé Marchand
Formal Methods Syst. Des.6
2017 Predictive runtime verification of timed properties
Srinivas Pinisetty, Thierry Jéron, Stavros Tripakis, Yliès Falcone, Hervé Marchand, Viorel Preoteasa
J. Syst. Softw.5
2015 Enforcement of (Timed) Properties with Uncontrollable Events
Matthieu Renard, Yliès Falcone, Antoine Rollet, Srinivas Pinisetty, Thierry Jéron, Hervé Marchand
ICTAC6
2015 TiPEX: A Tool Chain for Timed Property Enforcement During eXecution
Srinivas Pinisetty, Yliès Falcone, Thierry Jéron, Hervé Marchand
RV4
2014 Runtime enforcement of timed properties revisited
Srinivas Pinisetty, Yliès Falcone, Thierry Jéron, Hervé Marchand, Antoine Rollet, Omer Nguena-Timo
Formal Methods Syst. Des.4
2012 Runtime Enforcement of Timed Properties
Srinivas Pinisetty, Yliès Falcone, Thierry Jéron, Hervé Marchand, Antoine Rollet, Omer Nguena-Timo
RV4
2012 Synthesis of opaque systems with static and dynamic masks
Franck Cassez, Jérémy Dubreil, Hervé Marchand
Formal Methods Syst. Des.3
2012 More testable properties
Yliès Falcone, Jean-Claude Fernandez, Thierry Jéron, Hervé Marchand, Laurent Mounier
Int. J. Softw. Tools Technol. Transf.4
2011 Polychronous controller synthesis from MARTE CCSL timing specifications
abstract
The UML Profile for Modeling and Analysis of Real-Time and Embedded systems (MARTE) defines a mathematically expressive model of time, the Clock Constraint Specification Language (CCSL), to specify timed annotations on UML diagrams and thus provides them with formally defined timed interpretations. Thanks to its expressive capability, the CCSL allows for the specification of static and dynamic properties, of deterministic and non-deterministic behaviors, or of systems with multiple clock domains. Code generation from such multi-clocked specifications (for the purpose of synthesizing a simulator, for instance) is known to be a difficult issue. We address it by using the approach of controller synthesis. In our framework, a timed CCSL specification is regarded as a property whose satisfaction should be enforced for any UML diagram carrying it as annotation. To do so, CCSL statements are first translated into dynamical polynomial systems. Such systems can be manipulated using the model-checker Sigali to synthesize an executable property (a controller) which enforces the satisfaction of the specified timing constraints on the UML diagram with which it is executed.
Huafeng Yu, Jean-Pierre Talpin, Loïc Besnard, Hervé Marchand, Paul Le Guernic
MEMOCODE5
2010 Contracts for modular discrete controller synthesis
abstract
We describe the extension of a reactive programming language with a behavioral contract construct. It is dedicated to the programming of reactive control of applications in embedded systems, and involves principles of the supervisory control of discrete event systems. Our contribution is in a language approach where modular discrete controller synthesis (DCS) is integrated, and it is concretized in the encapsulation of DCS into a compilation process. From transition system specifications of possible behaviors, DCS automatically produces controllers that make the controlled system satisfy the property given as objective. Our language features and compiling technique provide correctness-by-construction in that sense, and enhance reliability and verifiability. Our application domain is adaptive and reconfigurable systems: closed-loop adaptation mechanisms enable flexible execution of functionalities w.r.t. changing resource and environment conditions. Our language can serve programming such adaption controllers. This paper particularly describes the compilation of the language. We present a method for the modular application of discrete controller synthesis on synchronous programs, and its integration in the BZR language. We consider structured programs, as a composition of nodes, and first apply DCS on particular nodes of the program, in order to reduce the complexity of the controller computation; then, we allow the abstraction of parts of the program for this computation; and finally, we show how to recompose the different controllers computed from different abstractions for their correct co-execution with the initial program. Our work is illustrated with examples, and we present quantitative results about its implementation.
Gwenaël Delaval, Hervé Marchand, Éric Rutten
LCTES2
2010 More Testable Properties
Yliès Falcone, Jean-Claude Fernandez, Thierry Jéron, Hervé Marchand, Laurent Mounier
ICTSS4
2009 Dynamic Observers for the Synthesis of Opaque Systems
Franck Cassez, Jérémy Dubreil, Hervé Marchand
ATVA3
2007 Integrating formal verification and conformance testing for reactive systems
abstract
In this paper, we describe a methodology integrating verification and conformance testing. A specification of a system - an extended input-output automaton, which may be infinite-state - and a set of safety properties ("nothing bad ever happens") and possibility properties ("something good may happen") are assumed. The properties are first tentatively verified on the specification using automatic techniques based on approximated state-space exploration, which are sound, but, as a price to pay for automation, are not complete for the given class of properties. Because of this incompleteness and of state-space explosion, the verification may not succeed in proving or disproving the properties. However, even if verification did not succeed, the testing phase can proceed and provide useful information about the implementation. Test cases are automatically and symbolically generated from the specification and the properties and are executed on a black-box implementation of the system. The test execution may detect violations of conformance between implementation and specification; in addition, it may detect violation/satisfaction of the properties by the implementation and by the specification. In this sense, testing completes verification. The approach is illustrated on simple examples and on a bounded retransmission protocol.
Camille Constant, Thierry Jéron, Hervé Marchand, Vlad Rusu
IEEE Trans. Software Eng.3
2005 Automatic Verification and Conformance Testing for Validating Safety Properties of Reactive Systems
Vlad Rusu, Hervé Marchand, Thierry Jéron
FM2
2002 Managing Multi-Mode Tasks with Time Cost and Quality Levels using Optimal Discrete Control Synthesis
abstract
Real-time control systems are complex to design, and automation support is important. We are interested in systems with multiple tasks, each with multiple modes, implementing a functionality with different levels of quality (e.g., computation approximation), and cost (e.g., computation time, energy). It is complex to control the switching of modes in order to insure properties like bounding cost while maximizing quality. We outline a technique for the automatic generation of such controllers involving an automaton-based formal model, and using optimal discrete control synthesis.
Hervé Marchand, Éric Rutten
ECRTS1
2002 A Protocol for Loosely Time-Triggered Architectures
Albert Benveniste, Paul Caspi, Paul Le Guernic, Hervé Marchand, Jean-Pierre Talpin, Stavros Tripakis
EMSOFT4
2002 A case study in applying discrete control synthesis to excavator operation
abstract
Robotic and control systems are ever more complex to design, program, as well as to operate. Existing theoretical work and tool support in discrete control synthesis can be applied to improve task-level robot programming. This requires to determine patterns of tasks and objectives, which are at once domain-specific to robotics, and generic enough to cover a broad class of control systems. We illustrate such a framework by a case study concerning the interactive discrete control of tasks in an excavating system.
Hervé Marchand, Éric Rutten
SMC (2)1
2001 Formal verification of programs specified with signal: application to a power transformer station controller
Hervé Marchand, Éric Rutten, Michel Le Borgne, Mazen Samaan
Sci. Comput. Program.1
2000 Incremental Design of a Power Transformer Station Controller Using a Controller Synthesis Methodology
abstract
The authors describe the incremental specification of a power transformer station controller using a controller synthesis methodology. They specify the main requirements as simple properties, named control objectives, that the controlled plant has to satisfy. Then, using algebraic techniques, the controller is automatically derived from this set of control objectives. In our case, the plant is specified at a high level, using the data-flow synchronous SIGNAL language, and then by its logical abstraction, called polynomial dynamical system. The control objectives are specified as invariance, reachability, ...properties, as well as partial order relations to be checked by the plant. The control objectives equations are synthesized using algebraic transformations.
Hervé Marchand, Mazen Samaan
IEEE Trans. Software Eng.1
1998 On the synthesis of optimal schedulers in discrete event control problems with multiple goals
abstract
This paper deals with a new type of optimal control for discrete event systems that extends the theory of Sengupta and Lafortune (1998). Our aim is to make a system optimally evolve through a set of multiple goals, one by one, with no order necessarily prespecified. Our method is divided into two steps. We first use the earlier results to synthesize individual optimal controllers for each goal. We then develop the solution of another optimal control problem, namely, how to adapt, if necessary, and schedule all of the controllers built in the first step in order to visit all of the goals with least total cost. We solve this problem by defining the notion of a scheduler and then by mapping the problem of finding an optimal scheduler to an instance of the traveling salesman problem.
Hervé Marchand, Olivier Boivineau, Stéphane Lafortune
SMC1
1998 A design environment for discrete-event controllers based on the SIGNAL language
abstract
In this paper, we present the integration of a controller synthesis methodology in the SIGNAL environment through the description of a tool dedicated to the algebraic computation of a controller and then to the simulation of the controlled system. The same language is used to specify the physical model of the system and the control objectives. The controller is then synthesized using the formal calculus tool SIGALI. The result is then automatically integrated in a new SIGNAL program in order to obtain a simulation of the result.
Hervé Marchand, Patricia Bournai, M. Leborgne, Paul Le Guernic
SMC1