What is the optimal base station (BS) resource allocation strategy given a measurement-based power consumption model and a fixed target user rate? Rush-to-sleep in time, rush-to-mute in space, awake-but-whisper in power, or a combination of them? We propose in this paper an efficient solution to the problem of finding the optimal number of active time slots, active antennas, and transmit power at active antennas in a multiple-input multiple-output (MIMO) orthogonal frequency-division multiplexing (OFDM) system under per-user rate and per-antenna transmit power constraints. The use of a parametric power consumption model validated on operator measurements of 4G and 5G BSs enhances the interpretation of the results. We discuss the optimal energy-saving strategy at different network loads for three BS configurations. Using as few BS antennas as possible is close to optimal in BSs not implementing time-domain power savings such as micro-discontinuous transmission (μDTX). Energy-saving schemes that jointly operate in the three domains are instead optimal when the BS hardware implements time-domain power-saving modes, with a tendency for rush-to-mute in massive MIMO and for rush-to-sleep in BSs with fewer antennas. Median energy savings up to 30% and energy efficiency improvements up to 50% are achieved at low network loads.

Accurate 3D indoor positioning is a sought-after feature in many applications. To achieve this, we perform a comparative study of proposed anchor selection methods applied to a hybrid RF-acoustic indoor positioning system. The positioning accuracy is evaluated for two 3D positioning mechanisms. In the first positioning approach, the proposed anchor selection methods are tested in a classical system which uses the selected noisy range estimates which are converted into a 3D position using a least squares (LS) estimator. This mechanism requires the exact knowledge of the anchor locations, which introduces undesired anchor position calibration, identification and commissioning steps when deploying such a system. In order to overcome this problem, a second positioning mechanism, by means of circular convolutional neural network (CCNN), is proposed. This model does not require the knowledge of the anchor locations, as it is implicitly learned during training. The proposed anchor selection methods are evaluated both for the classical LS estimator and the circular convolutional neural network (CCNN) model in both a shoebox and L-shaped room. The results indicate a significant improvement in accuracy when using anchor selection and/or the machine learning (ML) based models, primarily in rooms where Non-Line-of-Sight (NLoS) situations are encountered. For the classical system, it is more effective to use fewer, but more pertinent anchors, whereas using all anchors is optimal for ML methods. Nevertheless, ML methods outperform traditional positioning algorithms, and anchor selection addresses scalability.

Millimeter-wave (mmWave) technology holds the potential to revolutionize head-mounted displays (HMDs) by enabling high-speed wireless communication with nearby processing nodes, where complex video rendering can take place. However, the sparse angular profile of mmWave channels, coupled with the narrow field of view (FoV) of patch-antenna arrays and frequent HMD rotation, can lead to poor performance. We introduce six channel performance metrics to evaluate the performance of an HMD equipped with mmWave arrays. We analyze the metrics using analytical models, discuss their impact for the application, and apply them to 28 GHz channel sounding data, collected in a conference room using eight HMD patch-antenna arrays, offset by 45° from each other in azimuth. Our findings confirm that a single array performs poorly due to the narrow FoV, and featuring multiple arrays along the HMD’s azimuth is required. Namely, the broader FoV stabilizes channel gain during HMD rotation, lessens the attenuation caused by line of sight (LoS) obstruction, and increases the channel’s spatial multiplexing capability. In light of our findings, we conclude that it is imperative to either equip the HMD with multiple arrays or, as an alternative approach, incorporate macroscopic diversity by leveraging distributed access point (AP) infrastructure.

Indoor positioning applications are craving for ever higher precision and accuracy across the entire coverage zone. Optimal anchor placement and the deployment of multiple distributed anchor nodes could have a major impact in this regard. This paper examines the influences of these two difficult to approach hypotheses by means of a straightforward ultrasonic 3D indoor positioning system deployed in a real-life scenario via a geometric based simulation framework. To obtain an optimal anchor placement, a particle swarm optimization (PSO) algorithm is introduced and consequently performed for setups ranging from 4 to 10 anchors. In this way, besides the optimal anchor placement layout, the influence of deploying several distributed anchor nodes is investigated. In order to theoretically compare the optimization progress, a system model and Cramér-Rao lower bound (CRLB) are established and the results are quantified based on the simulation data. With limited anchors, the placement is crucial to obtain a high precision high reliability (HPHR) indoor positioning system (IPS), while the addition of anchors, to a lesser extent, gives a supplementary improvement.

Multiple low power wide area networks (LPWANs) have been rolled out to support the variety of IoT applications. These networks vary largely in terms of quality-of-service, throughput and energy-efficiency. To cover all LPWAN use-cases most optimally, multiple networks can be combined into a multiple radio access technology (multi-RAT) solution. In particular environmental monitoring in both smart city and remote landscapes. We present and share such a multi-RAT platform. To derive an accurate profile of the multi-RAT opportunities in various scenarios, in the-field network parameter are monitored. The platform collects per-packet energy-consumption, packet delivery ratio (PDR) and other parameters of LoRaWAN, NB-IoT and Sigfox. Our preliminary measurements demonstrate the validity of using a multi-RAT solution. For example, we illustrate the potential energy savings when adopting multi-RAT in various scenarios.

The number of wireless devices is drastically increasing, resulting in many devices contending for radio resources. In this work, we present an algorithm to detect active devices for unsourced random access, i.e., the devices are uncoordinated. The devices use a unique, but non-orthogonal preamble, known to the network, prior to sending the payload data. They do not employ any carrier sensing technique and blindly transmit the preamble and data. To detect the active users, we exploit partial channel state information (CSI), which could have been obtained through a previous channel estimate. For static devices, e.g., Internet of Things nodes, it is shown that CSI is less time-variant than assumed in many theoretical works. The presented iterative algorithm uses a maximum likelihood approach to estimate both the activity and a potential phase offset of each known device. The convergence of the proposed algorithm is evaluated. The performance in terms of probability of miss detection and false alarm is assessed for different qualities of partial CSI and different signal-to-noise ratio.

Recent works have focused on utilizing LoRa to establish long-range and low-power connections between internet of things (IoT) nodes and gateways. A multi-hop scheme opens opportunities to greatly increase coverage in situations with adverse propagation effects or thin gateway deployment. In this work, we propose a multi-hop LoRa-based protocol tailored to battery-powered IoT devices. The protocol uses a combination of preamble sampling and dynamic payload aggregation to improve energy efficiency. In contrast to prior work, a fine-grained energy model of the devices is considered, impacting the design choices in all protocol layers, i.e., application, medium access control (MAC), and routing layer. The protocol is implemented in C and made public in open source. A first experiment indicates a high packet delivery ratio and showcases the dynamic aggregation feature.

Large array systems use a massive number of antenna elements and clever precoder designs to achieve an array gain at the user location. These precoders require linear front-ends, and more specifically linear power amplifiers (PAs), to avoid distortion. This reduces the energy efficiency since PAs are most efficient close to saturation, where they generate most nonlinear distortion. Moreover, the use of conventional precoders can induce a coherent combining of distortion at the user locations, degrading the signal quality. In this work, novel linear precoders, simple to compute and to implement, are proposed that allow working close to saturation, while cancelling the third-order nonlinearity of the PA without prior knowledge of the signal statistics and PA model. Their design consists in saturating a single or a few antennas on purpose together with an negative gain with respect to all other antennas to compensate for the overall nonlinear distortion at the user location. The performance gains of the designs are significant for PAs working close to saturation, as compared to maximum ratio transmission (MRT) precoding and perfect per-antenna digital pre-distortion (DPD) compensation.

Autonomy of devices is a major challenge in many Internet of Things (IoT) applications, in particular when the nodes are deployed remotely or difficult to assess places. In this paper we present an approach to provide energy to these devices by Unmanned Aerial Vehicles (UAVs). Therefore, the two major challenges, finding and charging the node are presented. We propose a model to give the energy constrained node an unlimited autonomy by taking the Wireless Power Transfer (WPT) link and battery capacity into account. Selecting the most suitable battery technology allows a reduction in battery capacity and waste. Moreover, an upgrade of existing IoT nodes is feasible with a limited impact on the design and form factor.

Large array-based transmission uses the combination of a massive number of antenna elements and clever precoder designs to achieve array gain and spatially multiplex different users. These precoders require linear front-ends, and more specifically linear power amplifiers (PAs). However, this reduces energy efficiency since PAs are most efficient close to saturation, where they generate most nonlinear distortion. Moreover, the use of conventional precoders, such as maximum ratio transmission (MRT), induces a coherent combining of distortion at the user location, degrading the signal quality. In this work, a linear precoder is proposed that allows working close to saturation while canceling the coherent combining of the third order nonlinear PA distortion at the user location. In contrast to other solutions, the zero third-order distortion (Z3RO) precoder does not require prior knowledge of the signal statistics and the PA model. The design consists of saturating a single or a few antennas on purpose together with an opposite phase shift to compensate for the distortion of all other antennas. The resulting array gain penalty becomes negligible as the number of base station antennas grows large.

In multiple input multiple output (MIMO) systems, precoding allows the base station to spatially focus and multiplex signals towards each user. However, distortion introduced by power amplifier nonlinearities coherently combines in the same spatial directions when using a conventional precoder such as maximum ratio transmission (MRT). This can strongly limit the user performance and moreover create unauthorized out-of-band (OOB) emissions. In order to overcome this problem, the zero third-order distortion (Z3RO) precoder was recently introduced. This precoder constraints the third-order distortion at the user location to be zero. In this work, the performance of the Z3RO precoder is validated based on real-world channel measurement data. The results illustrate the reduction in distortion power at the UE locations: an average distortion reduction of 6.03 dB in the worst-case single-user scenario and 3.54 dB in the 2-user case at a back-off rate of -3dB.

Peak to average power (PAPR) reduction of OFDM signals is critical in order to improve power amplifier (PA) efficiency in base stations. For massive MIMO, the complexity of these methods can become a real bottleneck in implementing low power digital signal processing chains. In this work, we consider an antenna reservation technique, which uses a low complexity clipping method to reduce signal peaks and leverages the benefit of massive antennas, by reserving a subset of antennas in order to compensate for the clipping distortion. Reserving antennas on the other hand reduces the potential array gain in the massive MIMO system, complicating the application of antenna reservation. This work explores various design space parameters in antenna reservation such as number of reserved antennas, amount of peak reduction and clipping methods. We investigate the impact of these parameters on the error vector magnitude at the user and on the adjacent channel power ratio at both transmitter and user positions. Our results enable a deeper understanding of antenna reservation as a low complexity PAPR reduction method in massive MIMO systems.

In this paper, we experimentally analyze the spatial distribution of nonlinear distortion in massive MIMO systems with various array topologies and user locations. With an indoor channel measurement, we reveal the spatial distortion distribution of the in-band (IB) and out-of-band (OOB) power leakage in a real-life scenario. We further investigate the power leakage under different antenna array topologies: including uniform linear array (ULA), uniform rectangular array (URA), distributed linear subarrays (DIS). The impact of user location on the per antenna distortion is also visualized. The results indicate that the DIS array configuration achieves the lowest in-band and out-of-band power leakage, which renders the distributed array a potential to reduce the linearity requirement of PAs when scaling up a practical massive MIMO system.

Massive Multiple Input Multiple Output (MIMO) offers superior capacity for future networks. In the quest for energy efficient implementation of these large array-based transmission systems, the power consumption of the Power Amplifiers (PAs) is a main bottleneck. This paper investigates whether it is possible to operate the PAs in their efficient nonlinear region, as the Out-of-Band (OOB) distortion may not get the same array gain as the in-band (IB) signals. We present a framework to simulate the effects under realistic conditions, leveraging on an accurate Ray-Tracing Simulator (RTS). The results show that the often assumed i.i.d. Rayleigh fading channel model results in too optimistic predictions, also in Non Line of Sight (NLoS) multi-path scenarios, regarding the spatial distribution of OOB emissions. We further comment on the consequences in view of current regulatory constraints.

A distributed antenna system (DAS) consists of several interconnected access points (APs) which are distributed over an area. Each AP has an antenna array. In previous studies, the DAS has been demonstrated great potential to improve capacity and power efficiency compared to a centralized antenna system (CAS) which has all the antennas located in one place. The existing research also has shown that the placement of the APs is essential for the performance of the DAS. However, most research on AP placement does not take into account realistic constraints. For instance, they assume that APs can be placed at any location in a region or the array radiation pattern of each AP is isotropic. This paper focuses on optimizing the AP placement for the DAS with massive MIMO (D-mMIMO) in order to reduce the transmit power. A square topology for the AP placement is applied, which is reasonable for deploying the D-mMIMO in urban areas while also offering theoretically interesting insights. We investigate the impact of the radiation pattern, signal coherence, and region size on the D-mMIMO's performance. Our results suggest that (i) among the three factors, the array radiation pattern of each AP is the most important one in determining the optimal AP placement for the D-mMIMO; (ii) the performance of the D-mMIMO is highly impacted by the placement and array radiation pattern of each AP, the D-mMIMO with unoptimized placement may perform even worse than the CAS with massive MIMO (C-mMIMO); (iii) with the consideration of patch antennas and the mutual coupling effect, the optimized D-mMIMO can potentially save more than 7dB transmit power compared to the C-mMIMO. Furthermore, our analytical results also provide an intuition for determining an adequate AP placement for the D-mMIMO in practice.

Channel estimation is essential in massive MIMO systems. Pilot Contamination (PC) however, causes a major bottleneck in the acquisition of this information. The exploitation of the Angle of Arrival (AoA) provides multiple techniques for channel estimation under PC. However, many AoA estimation techniques require information on the signal statistics which is not available in dynamic scenarios. In this paper we propose and analyse the Matrix Pencil Method (MPM) to decorrelate contaminated channels based on their estimated AoA. We evaluate this method both through simulations and experiments in a real-life testbed. Our assessment focuses on a system with a Uniform Linear Array (ULA). The performance of the MPM is validated through simulations1with varying number of antennas, SNR and AoA difference. The results show that our approach effectively decorrelates the channels starting from 20 antennas and an SNR of 15 dB, which outperforms the theoretical expectation. This allows us to enhance the channel estimation quality under PC to the level of no PC. Real-life measurements confirm the simulated results. Our MPM implementation can achieve a target AoA estimation accuracy both with and without PC. We anticipate that the method can be extended for a Uniform Rectangular Array (URA).1We would like to thank NVIDIA for providing the GPU that was used to greatly accelerate our simulations.

Low-power wide-area technologies have demonstrated their usefulness in a wide variety of Internet of Things applications. New applications are emerging, requiring a mesh or point-to-point (P2P) topology, in contrast to the conventional star-of-stars topology. In this article, we evaluate the coverage and model the path loss (PL) of these links, based on experimental campaigns in three environments: 1) urban; 2) forest; and 3) coastal. More obstructions, scattering, and diffraction are encountered because the terminals are typically at a low height. This results in a higher PL compared to the star-of-stars topology. Consequently, more packets drop below the receiver sensitivity. Realistic PL parameters are estimated by also taking the censored data into account. The packet error ratio is determined based on the estimated PL parameters to evaluate the performance of P2P links. Even in these adverse environments, 80% of the transmitted packets are successfully received at a distance of approximately 200 m. Moreover, a range of over 4 km is observed in the line-of-sight scenario. Despite the unfavorable radio propagation in the urban scenario and the densely forested terrain, a maximum range of 1 km is achieved.

Both physical and MAC-layer parameters impact the autonomy of IoT devices. We present an open-source cross-layer assessment framework for Low Power Wide Area networks (LPWANs) in this paper. It extends the state-of-the-art with energy models, downlink messages, and adaptive datarate features. Hence, hypotheses and transmission schemes can be tested and evaluated. As a representative case, the LoRaWAN protocol is assessed. The findings demonstrate that a cross-layer is imperative to effectively realize LPWANs in terms of energy efficiency and throughput. For instance, up to a factor of three reduction in energy consumption can be achieved by transmitting longer packet on quasi-static channels. Yet, under adverse dynamic conditions, an energy penalty will occur.

Modulation waveform generators are frequently deployed for numerous applications such as communications. As a low-cost solution for high sampling rates, we investigate the BeagleBone Black (BBB) and more specific its Programmable Real-Time Unit (PRU) subsystem, which supports time critical tasks and fast deterministic IO operations. The implementation overview along with the achieved results in terms of throughput and reliability are herein presented and explained. The feasibility of a BBB PRU-based digital waveform generator was demonstrated under varying output configurations (up to 13) and sampling rates (up to 50 MSPS) with a high reliability .

Distributed massive multiple-input multiple-output (DM-MIMO) gives a higher spectral efficiency and enhanced coverage area, compared to collocated massive MIMO (CM-MIMO). In general, for massive MIMO, time division duplex is preferable as it enables downlink (DL) precoding based on uplink (UL) channel estimation. A time division duplex (TDD) reciprocity calibration is then essential to compensate the gap between the UL-DL channels, which can be done completely in the base station relying on sounding reference signals (SRS). For a collocated array, relying on mutual coupling between antenna elements, each SRS is received with sufficient power in the array, enabling a reliable estimate of the calibration coefficients. Nevertheless, for DM-MIMO, much less power is collected in distant inter-cluster antennas which degrades the accuracy of the estimated calibration. In this paper, we propose a novel inter-cluster combining method (ICCM) which improves the signal-to-quantization-noise ratio (SQNR) of the SRS, and hence achieves a more robust calibration accuracy for practical DM-MIMO systems. Our experimental results of two 32-antenna arrays distributed in an indoor environment show that ICCM outperforms the existing state-of-the-art algorithms in the sense of lower DL error vector magnitude (EVM) by exploiting diversity and array gain efficiently.

Massive MIMO has the potential to bring great spectral and energy efficiency improvements, making it a very promising technology for future wireless systems. Essential to achieve the gains in practice, is the ability to realize the many antenna paths at low complexity. In this paper, we consider the potential of processing at the semiconductor edge by allowing voltage over-scaling and complete antenna signal failures, focusing on the per-antenna digital functionality that dominant the DSP complexity. The impact of the resulting hardware errors on the performance of Massive MIMO transmission is analyzed. It shows that the inherent redundancy in the system brings a solid tolerance to sporadic hardware errors. Potential control tactics are introduced, that could further optimize the operation of the error-prone circuitry. We anticipate that by exploiting the system and circuit margins, up to 40% power reduction could be achieved on the considered DSP functions without sacrificing performance in many traffic scenarios.

Spin-transfer torque magnetoresistance random access memory is a major contender for static random access memory replacement in embedded caches at advanced fin field effect transistor nodes. It suffers, however, from the low resistance difference between the bistable states of the magnetic tunnel junction (MTJ). Variability on MTJ resistance and access transistors makes reliable read-out even more challenging. This triggered the use of complementary cells for low level caches needing high performance. This paper, focusing on the lower level caches, shows an improved 3T 2MTJ cell with a ground grid and a novel three transistor read and write operation to improve area density, sense margin, write performance, and write energy consumption. Despite the cell's three transistors, the improved array configuration reduces the cell area by 22% as compared with the 2T 2MTJ cell, making it only 55% larger than a 1T 1MTJ cell. The novel mismatch tolerant read operation uses all three transistors and increases the sense margin by up to 88%. The novel variation resilient write operation also uses all three transistors and takes advantage of the inherent MTJ characteristics and complementary operation of the cell. This increases the write performance by 2× and reduces the write energy by 3× compared with the 2T 2MTJ cell and by 1.5× compared with the 1T 1MTJ cell.

This paper presents an energy-efficient digital signal processor (DSP) for rectangular-to-polar conversion in 802.11ad polar transmitter working on 60 GHz band. Firstly, system simulations with a complete transmission chain are conducted with regard to error vector magnitude and output spectrum, which allows to systematically optimize the design requirements on the DSP block. Secondly, algorithm and architecture co-optimization on the DSP block is explored to minimize the power consumption. Finally, the proposed DSP is synthesized using 28 nm CMOS technology, which provides a throughput of 7.04 Giga samples per second with a power consumption of 28 mW, and area of 0.01 mm2.

Emerging 4G wireless communication systems need to deliver much higher data rates, more flexibility, and a significantly higher energy efficiency than current systems. To cope with this immense increase of requirements, new design approaches are a necessity. This paper focuses on the design of an advanced multiple-input-multiple-output (MIMO) detector, which is typically a bottleneck in the wireless receiver. In the proposed template-based design approach innovative architecture concepts, such as very wide register and distributed loop buffer, and algorithm-architecture co-optimizations are combined. The resulting MIMO detector processor, which is scalable to eight and more antennas, achieves a high area efficiency of 571 GOPS/mm2and a high energy efficiency of 3.3 GOPS/mW in the Taiwan Semiconductor Manufacturing Company (TSMC) 40-nm technology. By exploiting the dynamically varying requirements, the proposal has the potential to achieve a higher average energy efficiency than an application-specific integrated circuit (ASIC) equivalent. However, a penalty in total area consumption exists. The proposed architecture style offers an interesting and a very promising tradeoff in between the traditional ASIC and the other programmable processor solutions.

Reliability of advanced deeply scaled CMOS technologies is being threatened by time-dependent degradation mechanisms such as Negative Bias Temperature Instability (NBTI) phenomenon that cause workload-dependent shifts on a transistor's threshold voltage (VTH), and performance during its lifetime. In this study, NBTI-induced performance degradation of 32-bit adders (one of the most fundamental block of a processor's arithmetic logic unit) is investigated from the points of architectural topology, technology scaling (i.e. commercial 28, 45, 65nm nodes) and workload dependency. The selected adder architectures vary from basic to complex parallel-prefix ones. A workload-dependent, NBTI aging-aware digital design flow was developed within the industry standard EDA tool chain. NBTI model is based on the extracted Capture and Emission Time (CET) maps from the actual wafer measurements. Static Timing Analysis (STA) is performed to evaluate the performance degradation at the +3σ corner. Results on adders under the NBTI aging after 3 years show a performance loss up to 16%. NBTI aging results in the replacement of the time-zero critical path by an initially non-critical path during a circuit's lifetime. The time-zero critical path can shift to a new one with a probability of 89%. Technology scaling and the choice of process technology can impact the degradation by 2×. Finally, the performance degradation can vary up to 8.2× under workload variations.

Spin-transfer torque magnetic RAM (STT-MRAM) is one of the most promising non-volatile memory technologies and shows potential as an SRAM replacement. However, targeted for advanced CMOS technologies such as the 14nm FinFET node, time-zero variability is a major concern for these memory technologies. In this paper, we investigate the STT-MRAM variability with respect to different technology scenarios. We show the impact of these variations on the bit error rate of the emerging STT-MRAM memories.

Lattice Reduction aided softoutput MIMO detectors have been demonstrated to offer a promising gain. However, computing Log-Likelihood ratios (LLR) for near-optimal MIMO detection, still poses a significant challenge for practical implementations. In this work, we present counter-ML bit-flipping algorithm for LLR generation. The proposed LLR generation algorithm has been designed to take advantage of the previously reported list generation algorithm, Multi-Tree Selective Spanning (MTSS), by maximizing the reuse of computations. Afterwards, a C-programmable MIMO detector architecture providing both data level parallelism (DLP) and instruction level parallelism (ILP), is designed for implementation. The proposed solution supports multiple MIMO detection modes, with both hard and softoutput. Performance of the proposed solution can be tuned ranging from SIC to near-ML to near-MAP, by adjusting a single parameter. In case of 4 × 4 QAM-64, it achieves peak-throughputs of 2.43Gbps and 629Mbps in case of hard and softoutput MIMO detection, with only 66.37mW and 76.14mW respective power consumption.

This paper presents an efficient mitigation approach for duty cycle mismatch of in-phase and quadrature upconversion signals in digital transmitters. This approach is supported by a mathematical analysis of the baseband equivalent impact of duty cycle mismatch. An efficient digital pre-distortion method is proposed to eliminate the distortion impact. Simulation results show that, for both 64-QAM and 256-QAM modulation schemes, the error-vector-magnitude can be improved from -25.1dB to less than -55dB, which leaves substantial design margin for other non-idealities distorting the transmitted signal.

The LTE cellular network is designed for meeting the requirements of a broad range of applications in very dynamic conditions. This explains its great flexibility in resource allocation. In order to provide the mobile stations with the exact required services, the base station relies on feedback information reported by each mobile station. In this paper, several feedback reduction schemes are analysed and compared, for a broad range of LTE resource allocation schemes and deployment scenarios, by means of simulation and a quantitative cost model. It is concluded that feedback reduction should be adapted to the scenario, as function of users, resource allocation strategy or channel properties, and up to 139% gain in overall throughput can be obtained by doing so.

Efficient resource allocation is necessary to provide the users with the quality of service promised in modern cellular networks, such as LTE. Traditional allocation methods make use of the smallest granularity available, the physical resource block (PRB), to assign resources to each user. The selected resources assigned to a user form a transport block (TB). However, the standard constrains the use of only one modulation and coding rate per TB. This forces the channel quality of the resources to be averaged across the TB, in order to determine the best modulation and coding scheme. In state-of-the-art systems, a non-linear heuristic is used in order to perform this averaging. Unfortunately, when bad PRBs are present next to good ones, this strategy is not optimal. We show that dropping the worst PRBs can improve the performance while remaining standard-compliant. We propose a simple algorithm that can be overlaid to any existing solution and we analyse its effect on multiple state-of-the-art schedulers. A gain is obtained both in throughput (up to 8% increase) and in power consumption (up to 23% reduction).

We present a systematic methodology for exploring application partitioning and assignment together with platform architecture instantiation. Streaming applications with multiple runtime modes are considered. The platform architecture is based on a domain specific MPSoC architecture template. We show results using complete inner modem physical layer processing of wireless applications, WLAN and LTE. We show that the proposed methodology obtains up to 30% energy improvement in energy with negligible area overheads as compared to straight-forward mapping to one processor, while meeting performance constraints, for a multi-mode WLAN 11n system and single-mode LTE system.

Recently, multiple non-volatile emerging memories (NVMs) have been proposed and show promising properties to replace SRAM-based memories in future SoCs. However, these new emerging memories, such as STT-MRAM and ReRAM, provide new challenges for the processor design e.g. larger write latencies, higher power and lower endurance. In this paper, we propose a design method for memristor-based (ReRAM) memory architectures for embedded processors to address the effects caused by longer write latencies. We evaluate this method and present the design space for using ReRAM in the data memory of an wireless base band processor. We propose architectural solutions for concealing the slow write speed of ReRAM and show their trade-offs in terms of performance with respect to different write latencies. We show that for single benchmarks the performance penalty caused by the ReRAM write latency can be reduced to 7% for the complete wireless communication benchmark suite. Morevoer, for single benchmarks the performance penalty can be eliminated completely.

The Category-5 (Cat-5) UE defined by LTE, as the most demanding category, requires processing 20Mhz bandwidth and 4×4 MIMO transmissions. Very little progress has been reported for its feasibility on programmable processors. In fact, most related work focus on lower categories with much less throughput. Since MIMO signal processing complexity increases non-linearly even with the simplest linear MIMO detectors, 4×4 MIMO transmissions combined with 20Mhz bandwidth is much more challenging when compared to lower UE categories. Our work explores the feasibility of software defined baseband for the most demanding UE category. On a customized SDR baseband processor, we have recently accomplished a software defined downlink inner receiver for Cat-5 LTE UE. The implemented inner receiver includes fully fledged synchronization and data detection functionalities, including coarse CFO estimation/compensation, I/Q imbalance estimation/compensation, OFDMA demodulation, channel estimation, fine SCO/CFO estimation/compensation, MIMO channel processing, MIMO data detection and LLR generation. Both linear MIMO detectors and more advanced MIMO detectors have been studied. To the best of our knowledge, this is the first work experimenting practical Cat-5 LTE receivers on baseband processors.

Harmonic rejection mixing is indispensable in software defined radio receivers employing switched mixers. Current analog multi-path mixing solution suffers from phase and gain mismatches along the paths and as a consequence cannot provide sufficient harmonic rejection. In this paper, we present a low complexity flexible digital intensive harmonic rejection architecture and show how it can be used to enhance the rejection of any single harmonic interference by adaptively combining the different mixing paths. Simulation results show that the proposed method can reject any single interferer adaptively by over 80 dB, which is sufficient for practical applications.

Hybrid ARQ (HARQ) combines Automatic Repeat Request (ARQ) and Forward Error Correction (FEC) to exploit information from erroneous packets after retransmissions. Due to its superior reliability, HARQ became a crucial component of several important 3G and 4G systems such as Long Term Evolution (LTE) and LTE-Advanced. Although the performance advantage is very attractive, implementing HARQ is challenging with emerging high throughput communication systems. Knowing that LTE and LTE-A systems would provide Gbps or hundreds of Mbps, a straightforward implementation would require around 10 Mbit memory for a HARQ buffer. With cost and power-limited wireless terminals, the available memory size to support HARQ requires an efficient implementation. In this paper we propose a novel method to exploit the time coherence of the wireless channel in order to reduce the memory storage for HARQ. This method has been evaluated with a full LTE MIMO simulation chain. Compared to state-of-the-art solutions, we show a promising memory compression factor close to 4, whereas performance degradation is marginal.

In recent years, the algorithmic optimizations and implementations of near-optimal Multiple-Input Multiple-Output (MIMO) detectors have been an area of active research. Lattice Reduction (LR) has shown to be a promising technique to improve the performance of linear MIMO detectors. However, LR-aided linear hard-output MIMO detection is still far from optimal. Practical systems use soft-output information to exploit gains from coded systems in order to yield near-optimal performance. In this paper, the LR-aided Selective Spanning Sphere Detection algorithm is proposed as a reduced-complexity candidate list generation method for soft-output MIMO detection, specifically optimized for practical MIMO-OFDM systems. This algorithm uses efficient and scalable heuristics based on simple processor-friendly operations that significantly contribute to lowering the computational complexity of the MIMO detection problem. Results from Monte Carlo simulations reveal that LR-aided SSSD is a promising algorithm that is capable of providing near-optimal performance whilst being especially computationally efficient, in comparison to other algorithms.

With the advent of heterogeneous MPSoC platform architecture based implementations for the IEEE 802.11n PHY processing, system partitioning and assignment (P&A) have become a key challenge. In this paper we have analyzed the area and energy trade-offs across different P&A schemes for the 4×4 and the 2×2 MIMO 40MHz modes of 802.11n. We have considered the payload processing part of the inner-modem processing for 802.11n PHY. We also present a framework for systematically carrying out the P&A exploration. We show that by exploiting parallelism at different levels, the energy can be reduced with negligible area overheads, by about 40% and 15% for the 4×4 and 2×2 modes, respectively. We also show that the P&A schemes with fine-grained partitioning are more energy efficient for mapping both the modes together on the same platform.

With deeply scaled CMOS technology, Bias Temperature Instability (BTI) has become one of the most critical degradation mechanisms impacting the device reliability. In this paper, we present the BTI evaluation of a single inverter gate covering both the PMOS and NMOS degradations in a workload dependent, atomistic trap-based, stochastic BTI model. The gate propagation delay depends on the gate intrinsic delay, the input signal characteristics, and the output load. Thus, the BTI degradation is investigated due to the impact of 1) duty factor, 2) periodic clock-based and non-periodic random input sequences, 3) gate drive strength. The inverter is chosen due to its representativity of other CMOS logic gates. The applied BTI model is stochastic, and the device parameters are orthogonally generated by distributions. Results show 3% and 27% degradation shifts on the distribution mean and worst-case. In addition, it is shown that the near-critical paths with lower drive strength cells are more susceptible to the BTI degradation than the critical paths with higher drive strength cells.

Hybrid ARQ (HARQ) combines Automatic Repeat Request (ARQ) and Forward Error Correction (FEC) to exploit information from erroneous packets after retransmissions. Due to its superior reliability, HARQ became a crucial component of several important 3G and 4G systems. Although the performance advantage is very attractive, implementing HARQ is challenging with emerging high throughput communication systems such as LTE and LTE-A. Specifically, a large amount of data needs to be stored whenever there is a retransmission. Knowing that LTE/LTE-A systems would provide Gbps or hundreds of Mbps, a straightforward implementation would require around 14 Mbit memory as HARQ buffer. With cost and power limited wireless terminals, the available memory size to support HARQ is a strict and challenging constraint. Hence, it is essential to find efficient techniques to minimize the memory footprint for storing erroneous packets with marginal or, preferably, no degradation. In the context of LTE systems, we propose a novel method to reduce the memory footprint for HARQ systems. This method has been evaluated with a fully fledged practical LTE simulation chain with MIMO transmissions. Compared to state-of-the-art solutions, we show a promising memory compression factor that is close to 5, whereas communication performance degradation is marginal.

The rapidly evolving and diversifying wireless landscape demands highly flexible wireless chipsets. Due to the ultimate programmability, SDR solutions are becoming more and more attractive. However, the programmability overhead is still a concern for the silicon area cost of SDR solutions. In this work, we prove that, with algorithm and architecture co- design, SDR solutions can be very competitive even when compared to highly optimized ASICs. Specifically, we show a baseband processor design that can support ISDB-T, DVB-T and ATSC, but the area cost is still comparable to the combination of ASICs which handle the three terrestrial digital TV standards respectively.

We address the problem of detecting and locating narrowband tones in an undersampled signal. It is known that uniformly undersampled signals exhibit frequency aliasing, whereby the frequency location is impossible. To alleviate aliasing, non-uniform sampling can be used. This, however, generates a high level of frequency leakage that prevents detection of weaker signals. We introduce a novel iterative frequency excision technique that allows to detect tones below the original noise floor due to leakage. Up to 20dB of leakage reduction has been achieved with this method.

Novel cognitive radio platforms such as IMECs Cognitive Baseband RAdio (COBRA) should ensure the feasibility of multiple streams and their reconfigurability and scalability during run-time. The control over those tasks should be dedicated to a run-time controller that (re)allocates the resources on the platform. E.g., when user starts a new stream or the channel conditions change requiring switch to different modulation and coding scheme. The current transaction level models are too detailed for rapid exploration of all run-time options and the high-level data-flow frameworks (such as Kahn process networks) lack the dynamism and reconfigurability that is essential for the exploration. In this paper we propose the DAtaflow for Run-Time (DART), the high-level dynamic data-flow platform model framework, suited for rapid run-time control development. We sketch also how to use this framework to develop such a controller in the reactive and more challenging, proactive way.

Lattice Reduction (LR) is a promising technique to improve the performance of linear MIMO detectors. In this paper the Scalable Block-based Parallel LR algorithm (SBP-LR) is proposed and optimized for parallel programmable baseband architectures offering ILP and DLP features. In our algorithm, architecture-friendliness is explicitly introduced from the very beginning of the algorithm/architecture co-design flow. In this context, abundant vector-parallelism is enabled with highly-regular and deterministic data-flow. Hence, SBP-LR can be easily parallelized and efficiently mapped on Software Defined Radio (SDR) baseband architectures. The proposed algorithm has been implemented on ADRES and is evaluated in the context of 3GPP LTE. Most of the previously reported algorithms are implemented for ASIC or FPGA. However, to the best of author's knowledge, this is the first reported LR algorithm explicitly optimized for a Coarse Grain Reconfigurable Array (CGRA) processor like ADRES.

With the soaring development cost of deep sub-micron silicon and the fast-growing diversity in wireless communications, software defined baseband becomes more and more important for handheld devices. However, most software defined receivers reported in previous literatures are still far away from fulfilling the requirement of emerging wireless standards such as the LTE-Advanced. The category-E User Equipment (UE) defined in LTE-Advanced, as the most demanding category for handheld devices, requires processing 2 concurrent data streams at around 300Mbps aggregated throughput. It is not clear whether SDR baseband processors can tackle this challenge. In our work, we explore the feasibility for software defined baseband for LTE-Advanced. With a highly customized SDR baseband processor, we have recently accomplished a software defined downlink inner receiver for Category-E LTE-Advanced UE. The implemented inner receiver includes fully fledged synchronization and data detection functionalities, including coarse CFO estimation/compensation, I/Q imbalance estimation/compensation, OFDMA demodulation, channel estimation, fine SCO/CFO estimation/compensation, MIMO channel processing, MIMO data detection and LLR generation. This paper is intended to bring an overview for the work and emphasizes key aspects that enable the feasibility of the work. In this paper, we will introduce the algorithm and processor architecture co-design flow, overall receiver functionalities, important optimizations and implementation results.

In next generation systems and networks, the incorporation of mechanisms achieving robust, predictable and self-adaptive behavior with minimum cost will be a key requirement. Towards this goal we introduce the notion of the "self-growing network". The latter, in its initial deployment stage, is limited to a single dedicated purpose (energy-efficient networking, spectrum efficient communications, control and surveillance use, etc) but can evolve/grow into a multi-purpose, versatile infrastructure, that serves a broader range of applications by utilising combinations of self-x and cooperating features.

Emerging SDR baseband platforms are usually based on multiple DLP+ILP processors with massive parallelism. Although these platforms would theoretically enable advanced SDR signal processing, existing work implemented basic systems and simple algorithms. Importantly, MIMO is not fully supported in most implementations. Implemented MIMO but with a simple linear detector. Our work explores the feasibility for SDR implementations of soft-output ML MIMO detectors, which brings 6-12 dB SNR gains when compared to popular linear detectors. Although soft-output ML MIMO detectors are considered to be challenging even for ASICs, we combine architecture-friendly algorithms, application specific instructions, code transformations and ILP/DLP explorations to make SDR implementations feasible. In our work, a 2times4 ADRES based ASIP with 16-way SIMD can deliver 193 Mbps for 2times2 64 QAM, and 368 Mbps for 2times2 16 QAM transmissions. To the best of our knowledge, this is the first work exploring SDR based soft-output ML MIMO detectors.

Complex signal processing algorithms are often specified in floating point precision. Thus, a type conversion is needed when the targeted platform requires fixed-point precision. In this work we proposed a new method to evaluate the final impact of finite precision processing in wireless applications. The latter combines analytical analysis with simulations. This extends previous work including the effect of the decision-making errors resulting from quantization. Thereby efficient dimensioning of the minimum bit-widths that satisfy a given accuracy constraint can be deployed. The method is validated with two representative case studies, namely an OFDM inner receiver and a Near-ML MIMO (Multiple Inputs, Multiple Outputs) detector.

Software Defined Radio (SDR) terminals are crucial to enable seamless and transparent inter-working between fourth generation wireless access systems or communication modes. On the longer term, SDRs will be extended to become cognitive radios enabling efficient spectrum usage. Future communication modes will have heavy hardware resource requirements and switching between them will introduce dynamism in respect with timing and size of resource requests. In this paper, we propose a modeling framework that enables the simulation of such complex, dynamic hardware/software SDR designs. Thus, we can do an exploration, which can pinpoint the coarse grain platform component requirements for future SDR applications in a very early design phase. Our solution differs from existing ones by combining multiple simulation granularities in a way that is specialized for SDR simulation. Finally, we demonstrate the effectiveness of our approach with a case study for dimensioning the on-chip interconnect of a prospective SDR platform.

Wireless communication standards are continuously evolving and getting more diverse.This requires a wide variety of baseband implementations within a short time-to-market. Besides, deep sub-micron technology significantly increases the design complexity and associated cost. These yield a growing need for reconfigurable/programmable baseband solutions. Implementing the whole base band functionality on programmable architectures, as foreseen in the tier-2 SDR, will become a must. However, the energy efficiency of SDR baseband platforms is unavoidably worse than the ASIC counterparts. This brings a challenging gap to bridge, which is even broadening further in emerging high rate standards. With a holistic view, we advocate a system level algorithmic approach to bridge this gap. Specifically, we propose to leverage the advantages (programmability) of SDR platforms to compensate for its disadvantages (energy efficiency). Highly flexible baseband algorithms are designed to exploit the abundant dynamics in the environment and the user requirements.In this way, the baseband can utilize the dynamics and substantially reduce the average energy consumption. In this paper, we present a design methodology and principles, illustrated with 3 representative case studies in HSDPA, WiMAX, and 3GPP LTE.

For both outdoor and indoor wireless systems there is an increasing demand of high spectral efficiency at a very low cost and power consumption. In this context, MIMO wireless system adopting spatial multiplexing offer a way of increasing the spectral efficiency of the system. In order to fully exploit this capacity non linear MIMO detectors such as maximum likelihood detectors are required. However, when high order modulation schemes are applied, the complexity of this kind of detector becomes prohibitive for a practical implementation. As a solution to this problem, low complexity maximum likelihood detectors such as sphere detectors are appealing as a low complexity solution for high spectral efficiency transmission. Although sphere decoding provides a lower complexity solution than a classical ML detector, its complexity still remains unpredictable and exponentially dependent on channel propagation conditions. This variability in complexity makes the implementation of sphere decoders not practical. In this paper, a new approach for constraining the ML search space is proposed which provides a predictable upper bound for complexity, hence facilitating its implementation. Moreover, the new approach for computing the constrained search space significantly reduces the complexity of the detection while offering scalability in terms of performance and complexity. Simulation results in a cellular system demonstrate the scalability of our detector and the performance/complexity trade-off that it enables.

The success of dynamic spectrum access through simple listen-before-talk etiquettes has paved the way for opening up the spectrum. However, many problems still remain in these networks. Due to the complex nature of IEEE 802.11 networks, for instance, optimizing these networks regarding power, rate and carrier sense threshold remains a very tough challenge. In this paper, we introduce spatial learning. This new optimization algorithm for IEEE 802.11 networks employs learning to find an optimal combination of power, rate and carrier sense threshold. It is assumed that nodes behave selfishly and are only interested in optimizing their own throughput. Extensive network simulations show that spatial learning performs better than the state-of-the- art solution, spatial backoff, on all axes of interest: network-wide throughput, fairness and power consumption.

Nowadays, mobile devices are integrating an increasing variety of wireless communication standards, and each standard demands a multitude of modes. This tremendous diversity, combined with the increasing development-cost of deep-submicron silicon, desires highly flexible baseband implementations. The tier-2 SDR (Software Defined Radio) paradigm, where the entire baseband runs on programmable architectures, is very attractive to obtain the desired flexibility. Parallel ISP (Instruction Set Processor) based SDR baseband platforms have attracted extensive interest in recent years. However, such implementations typically come with a much lower energy-efficiency than traditional implementations as ASICs (Application Specific Integrated Circuits). This energy efficiency gap remains to be bridged in order to make SDR more pervasive. Importantly, the gap is becoming even more and more challenging in emerging high rate communication standards, such as 3GPP LTE, Mobile WiMAX and 802.11n. This situation demands disruptive innovations.

The software-defined radio (SDR) concept aims to enabling cost-effective multi-mode baseband solutions for wireless terminals. However, the growing complexity of new communication standards applying, e.g., multi-antenna transmission techniques, together with the reduced energy budget, is challenging SDR architectures. Coarse-grained array (CGA) processors are strong candidates to undertake both high performance and low power. The design of a candidate hybrid CGA-SEVID processor for an SDR baseband platform is presented. The processor, designed in TSMC 90 G process according to a dual-VT standard-cells flow, achieves a clock frequency of 400 MHz in worst case conditions and consumes maximally 310 mW active and 25 mW leakage power (typical conditions) when delivering up to 25,6 GOPS (16-bit). The mapping of a 20 MHz 2times2 MIMO-OFDM transmit and receive baseband functionality is detailed as an application case study, achieving 100 Mbps+ throughput with an average consumption of 220 mW.

ML and near-ML MIMO detectors have attracted a lot of interest in recent years. However, almost all the reported implementations are delivered in ASICs or FPGAs. Our contribution is optimizing the near-ML MIMO detector for parallel programmable architectures, such as those with ILP and DLP features. In the proposed SSFE (selective spanning with fast enumeration), architecture-friendliness is explicitly introduced from the very beginning of the design flow. Importantly, high level algorithmic transformations make the dataflow pattern and structure fit architecture-characteristics very well. We enable abundant vector-parallelism with highly regular and deterministic dataflow in the SSFE; memory rearrangements, shuffling and non-predictable dynamism are all elaborately excluded. Hence, the SSFE can be easily parallelized and efficiently mapped onto ILP and DLP architectures. Furthermore, to fine-tune the SSFE on parallel architectures, extensive pre-compiler transformations are applied with the help of the application-level information. These optimize not only computation-operations but also address-generations and memory-accesses. Experiments show that the SSFE brings very efficient resource-utilizations on real-life VLIW architectures. Specifically, with the SSFE the percentage of NOPs instructions on VLIW is below 1%, even better than that achieved by the software-pipelined FFT. To the best of our knowledge, this is the first reported work about comprehensive optimizations of near-ML MIMO detectors for parallel programmable architectures.

The PFFT (Partial FFT) is an extended FFT where only part of input or output bins are used. By pruning the useless dataflow, the PFFT can potentially achieve a significant speedup in many important applications. Although theoretical aspects of the PFFT have been thoroughly studied in past three decades, efficient implementations were rarely reported. The most important obstacle is the highly irregular dataflow and the associated control flow. In addition, a size-N PFFT has 2Ndataflow possibilities, so that delivering both flexibility and efficiency in the same implementation is very challenging. This paper presents a generic scheme to map the highly irregular dataflow of arbitrary PFFT onto ILP architectures with highly efficient SWP (Software-Pipelining). Constraints and opportunities of algorithms and architecture are carefully analyzed and exploited. We introduce a multi-phase partitioning, bringing heterogeneous control structures and heterogeneous software pipelining schemes to minimize control overheads and to maximize the efficiency of SWP. The proposal has been tested with 10 representative benchmarks extracted from baseband applications. In experiments cycle-counts, instructions, NOPs, LID/LIP access/miss/hit are thoroughly analyzed. Comparing to full FFTs with efficient SWP, our work reduces 20.5% - 87.5% cycle-counts, 11.2% - 86.5% instructions, 16.1% - 79.4% LID cache accesses and 19.5% - 87.1% LIP cache accesses. To the best of our knowledge, this is the first reported work about the generic software-pipelined PFFT on ILP architectures.

User demand, standards and products for digital nomadic communications are evolving quickly. The combination of this changing environment together with the need for short time-to-market pushes for more flexible implementations. Software Defined Radios (SDR) have been introduced as the ultimate way to achieve such flexibility. The reduced energy budget required by battery-powered solutions makes the typical worst-case static dimensioning unaffordable under highly dynamic operating conditions. Instead, more energy-scalable algorithms and implementations are entailed to provide flexibility while maintaining the required energy efficiency. Particularly, energy-scalable implementations can exploit data format properties to offer different tradeoffs between accuracy and energy. In this paper, such a technique is developed and applied to the SDR implementation of a 2 antennas 200 Mbps+ OFDM (Orthogonal Frequency-Division Multiplexing) inner modem receiver on a C-programmable CGA (Coarse Grain Array) processor with extensive SIMD (Single Instruction Multiple Data) support. By defining separate implementations for different combinations of modulation scheme and coding rate, up to 3-fold gains can be achieved in the average energy consumption.

In this paper, we will present a near-ML (maximum likelihood) MIMO (multiple input multiple output) detector explicitly optimized for parallel programmable baseband architectures, such as DSPs (digital signal processors) with VLIW (very long instruction word), SIMD (single instruction multiple data) or vector processing features. First, we propose the SSFE (selective spanning with fast enumeration) algorithm as an architecture friendly near-ML MIMO detector. The SSFE has a distributed and greedy algorithmic structure that brings a completely deterministic and regular dataflow. This enables efficient parallelization on programmable architectures. More importantly, in order to exploit the abundant flexibility enabled by programmable architectures, we propose an efficient online algorithm to adaptively adjust the search range of the SSFE according to the numerical properties of MIMO channel matrixes. Such adaptiveness brings significant throughput improvements at negligible performance degradations. Specifically, on VLIW DSP TI TMS320C6416, such a dynamic adaptation brings 2.62 times to 28.6 times improvements (comparing to the static SSFE) for 1/2 turbo-coded 4 times 4 64 QAM transmissions over 3GPP suburban macro channels, delivering 80 - 103 Mbps average throughput.

The success of dynamic spectrum access through simple listen-before-talk etiquettes has made way for opening up the spectrum. However, many problems still remain in this kind of networks. Stations might not be able to sense as much transmissions and hence defer channel access less often than their neighbors. This can lead to unfairness or (worst-case) starvation of certain terminals. In this paper we model the throughput of a large-scale 802.11 network. Although the fairness issues in these networks are known, network modeling is still focusing on small-scale rigid networks. We want to open up this research toward large-scale randomly distributed topologies. A new model is developed to predict the long-term throughput of flows inside such a large-scale 802.11 network. Our model is validated through ns-2 simulations.

The diversity and evolution of wireless communication standards are fast-pacing. This requires a wide-variety of baseband implementations within short time-to-market. Besides, always deeper submicron technology significantly increase design cost. This yields an increasing need for using reconfigurable or programmable solutions for an always larger part of wireless modems. Mapping the whole baseband functionality on a programmable architecture, as foreseen in tier-2 SDR, will become a must in future implementation. In handhelds where the multi-mode trend adds extra needs for programmability, the energy efficiency of SDR baseband is however a major concern. New processor architectures with major improvements on energy efficiency (GOPS/mW) are emerging but are still not sufficient to catch the continuously increasing complexity of wireless physical layers within the shrinking energy budget. To enable SDR in size, weight and power constrained devices, innovation is also needed at the software side. Specifically, a thorough architecture-aware algorithm implementation methodology is needed for the baseband signal processing functions, which account for most of the SDR computational complexity. We present the premise of such a methodology and illustrate its effectiveness on the design of key kernels from present and future wireless baseband systems.

ML and near-ML MIMO detectors have attracted a lot of interest in recent years. However, almost all of the reported implementations are delivered in ASIC or FPGA. Our contribution is to co-optimize the near-ML MIMO detector algorithm and implementation for parallel programmable base-band architectures, such as DSPs with VLIW, SIMD or vector processing features. Although for hardware the architecture can be tuned to fit algorithms, for programmable platforms the algorithm must be elaborately designed to fit the given architecture, so that efficient resource-utilizations can be achieved. By thoroughly analyzing and exploiting the interaction between algorithms and architectures, we propose the SSFE (selective spanning with fast enumeration) as an architecture-friendly near-ML MIMO detector. The SSFE has a distributed and greedy algorithmic structure that brings a completely deterministic and regular dataflow. The SSFE has been evaluated for coded OFDM transmissions over 802.11n channels and 3GPP channels. Under the same performance constraints, the complexity of the SSFE is significantly lower than the K-Best, the most popular detector implemented in hardware. More importantly, SSFE can be easily parallelized and efficiently mapped on programmable baseband architectures. With TI TMS320C6416, the SSFE delivers 37.4 - 125.3 Mbps throughput for 4x4 64 QAM transmissions. To the best of our knowledge, this is the first reported near-ML MIMO detector explicitly designed for parallel programmable architectures and demonstrated on a real-life platform.

New air interfaces are currently being developed to meet the high spectral efficiency requirements of the emerging wireless communication systems. In this context, OFDM is considered as a promising air interface candidate for both indoor and outdoor communications. Besides spectral efficiency and power consumption, the production cost of the transceiver should also be optimized. Direct-conversion radio frequency receivers are appealing because they avoid costly intermediate frequency hardware. However, they imply analog IQ separation, introducing a phase and amplitude mismatch between the I and Q branches. A communication system based on OFDM is sensitive to synchronization errors, such as CFO, and to front- end non-idealities, such as IQ imbalance. The goal of this paper is to use the iterative EM algorithm to acquire jointly the CFO and the IQ imbalance. The solution relies on a standard compliant repetitive preamble and does not require the knowledge of the propagation channel. Based on a second order approximation of the likelihood function, the complexity of the EM algorithm is significantly reduced. The algorithm is shown to perform extremely well: the estimates of the CFO and of the IQ imbalance converge to their ML estimate after less than 3 iterations. It outperforms state-of-the-art solutions significantly and suffers from a lower computational complexity. While the CFO estimate is robust against variations of the SNR, the IQ imbalance estimate accuracy is reduced at values of the SNR below 10 dB and above 35 dB.

Advances in low-power and low-cost sensor networks have led to solutions mature enough for use in a broad range of applications varying from health monitoring to building surveillance. The development of those applications has been stimulated by the finalization of the IEEE 802.15.4 standard, which defines the medium access control (MAC) and physical layer for sensor networks. One of the MAC schemes proposed is slotted carrier sense multiple access with collision avoidance (CSMA/CA), and this paper analyzes whether this scheme meets the design constraints of those low-power and low-cost sensor networks. The paper provides a detailed analytical evaluation of its performance in a star topology network, for uplink and acknowledged uplink traffic. Both saturated and unsaturated periodic traffic scenarios are considered. The form of the analysis is similar to that of Bianchi for IEEE 802.11 DCF only in the use of a per user Markov model to capture the state of each user at each moment in time. The key assumptions to enable this important simplification and the coupling of the per user Markov models are however different, as a result of the very different designs of the 802.15.4 and 802.11 carrier sensing mechanisms. The performance predicted by the analytical model is very close to that obtained by simulation. Throughput and energy consumption analysis is then performed by using the model for a range of scenarios. Some design guidelines are derived to set the 802.15.4 parameters as function of the network requirements.

In many portable devices, wireless network interfaces consume upwards of 30% of scarce system energy. Reducing the transceiver's power consumption to extend the system lifetime has therefore become a design goal. Our work is targeted at this goal and is based on the following two observations. First, conventional energy management approaches have focused independently on minimizing the fixed energy cost (by shutdown) and on scalable energy costs (by leveraging, for example, the modulation, code-rate and transmission power). These two energy management approaches present a tradeoff. For example, lower modulation rates and transmission power minimize the variable energy component, but this shortens the sleep duration thereby increasing fixed energy consumption. Second, in order to meet the quality of service (QoS) timeliness requirements for multiple users, we need to determine to what extent each system in the network may sleep and scale. Therefore, we propose a two-phase methodology that resolves the sleep-scaling tradeoff across the physical, communications and link layers at design time and schedules nodes at runtime with near optimal energy-efficient configurations in the solution space. As a result, we are able to achieve very low run-time overheads. Our methodology is applied to a case study on delivering a guaranteed QoS for multiple users with MPEG-4 video over a slow-fading channel. By exploiting runtime controllable parameters of actual RF components and a modified 802.11 medium access controller, system lifetime is increased by a factor of 3-to-10 in comparison with conventional techniques.

The improvement of spectral efficiency comes at the cost of exponential increment of signal processing complexity [1]. Hence, the energy-efficiency of baseband has recently turned out to be the bottleneck when deploying advanced air interfaces such as that in 4G. We advocate the scalable baseband design as a system level technique to aggressively optimize the average computation-load and associated energy-consumption. The key technique is to dynamically scale the baseband processing itself to the user requirement, the environment, the platform, etc. In this paper, we present the scalable design and VLIW processor based implementation of the OFDMA modulator, which is one of the most energy consuming parts of OFDMA and MIMO- OFDMA transmitters (in IEEE 802.16e , 3GPP LTE, etc.). Our work enables the OFDMA modulator to scale the modulation- accuracy and computation-load, so that the OFDMA modulator can dynamically reconfigure and work with minimal number of operations, whereas the required modulation-accuracy is still firmly guaranteed. Our work brings significant reductions in the average computation-load and associated energy-dissipation on real-life programmable platforms. Specifically, when the user is working with 16QAM and 1/2 coding rate (Turbo Coding) in a half-loaded 8-user system, the proposed scheme reduces 84% of the cycle-count and the associated energy-consumption on TI TMS320C6713, whereas the resulted Relative Constellation Error (RCE) is still lOdB better than the required RCE in IEEE 802.16e specifications.

Nowadays a lot of effort is spent on developing OFDM-based inexpensive wireless transceivers. Direct-conversion radio frequency transceivers are appealing because they avoid costly IF analog components. This kind of transceivers imply analog RF I/Q separation. The mismatch between the analog components in the in-phase and quadrature branches introduces an unwanted in-band interference. Unfortunately, OFDM-based systems are very sensitive to I/Q mismatch, mostly when high order modulation schemes are applied. A digital compensation of this unwanted effect is required. In this paper, we developed an iterative method for estimating and compensating the transmitter/receiver frequency-dependent I/Q imbalance jointly with the propagation channel in the frequency domain. The new estimation technique resorts to the iterative Expectation- Maximization algorithm in order converge to the ML estimation for both channel and IQ imbalance coefficients in presence of unknown transmitted data symbols. Although the the estimation may be perform in the absence of known pilot symbols, the algorithm provides flexibility in terms of pilot sequence, allocation and load in order to improve its convergence. An advanced low complexity equalizer is proposed which compensates for the frequency-dependent IQ imbalance. Simulation results show optimal performance even in the absence of any pilot symbol and large IQ mismatches. The proposed technique enables the system to achieve high SNRs.

This paper proposes iterative estimators of quasi static frequency selective channels. Their properties (in terms of expectation and mean-squared estimation error) as well as complexity are discussed. Their average performance is also analytically approached. For the sake of low complexity, the derived estimators are either linear or affine in the vector of observations at the channel output. Such estimators are referred to as iterative because they use soft information on data symbols fed back by the soft-in/soft-out (SISO) channel decoder of a turbo equalizer. Because involved in this iterative process, they perform better at low signal-to-noise ratios (SNRs) than standard (i.e. non iterative) channel estimators using the same number of pilot symbols. Conversely, iterative estimators require a smaller number of pilot symbols to achieve the same performance as standard estimators.

Advanced adaptive filters have been shown to be very powerful for tracking time varying channels in various wireless communications system. However, the performance comes at the expense of highly resource-demanding implementations, especially in the context of programmable architecture based SDR. We present the optimizations for programmable implementation of QRD based SRI-RLS, which represents a large family of advanced adaptive filters. The key contribution of our work is to comprehensively and systematically remove the redundant operations in the QRD for SRI-RLS. Although most signal processing and scientific libraries implement householder reflection based QRD, we explore different alternatives and then choose given rotations based QRD to enable the aforementioned systematic redundancy removals. Our work significantly reduces the resource requirements (cycle count, energy consumption, etc.) of SRI-RLS implementation. Comparing to the widely accepted QRD implementation in numerical recipes, our work reduces 96.4% cycle-count on a typical baseband DSP (TI TMS320C6713), enabling efficient implementations. The paper shows that removing redundancy is very effective for modern statistical signal processing algorithms that largely rely on cascaded matrix operations.

In order to meet the data rate and quality-of-service (QoS) requirements of the future cellular systems, new air interfaces are currently under development. In this paper, we compare two air interfaces of particular interest for the uplink: cyclic-prefix code-division multiple access (CP-CDMA) proposed in the literature as an evolution of direct-sequence code-division multiple access (DS-CDMA) because it enables the low complexity equalization of the multipath channel in the frequency domain, and single-carrier frequency-division multiple access (SC-FDMA), recently proposed in the long term evolution of the 3GPP standard because it enables the easy separation of the users in the frequency domain. We demonstrate analytically that SC-FDMA is a special case of CP-CDMA, in which the CDMA codes have been optimized to minimize the symbol estimation mean square error (MSE) under a constraint of received power. Numerical results show that SC-FDMA outperforms significantly CP-CDMA at high user loads. The transmit power necessary to fulfill the received power constraint is higher in case of SC-FDMA than in case of CP-CDMA when the carrier sub-sets are allocated randomly to the users, and lower when the carrier sub-sets are allocated in an optimized way.

New air interfaces are currently being developed to meet the high spectral efficiency requirements of the emerging wireless communication systems. In this context, OFDM is considered as a promising air interface candidate for both indoor and outdoor communications. Besides spectral efficiency and power consumption, the production cost of the transceiver should also be optimized. Direct-conversion radio frequency receivers are appealing because they avoid costly intermediate frequency hardware. However, they imply analog IQ separation, introducing a phase and amplitude mismatch between the I and Q branches. A communication system based on OFDM is sensitive to synchronization errors, such as CFO, and to front-end non-idealities, such as IQ imbalance. The goal of this paper is to use the iterative EM algorithm to acquire jointly the CFO and the IQ imbalance. The solution relies on a repetitive preamble and does not require the knowledge of the propagation channel. Based on a second order approximation of the likelihood function, the complexity of the EM algorithm is significantly reduced. The algorithm is shown to perform extremely well: the estimates of the CFO and of the IQ imbalance converge to their ML estimate after less than 3 iterations. While the CFO estimate is robust against variations of the SNR, the IQ imbalance estimate accuracy is reduced at values of the SNR below 10 dB and above 35 dB.

Changing user scenarios demand wireless connectivity among different standards. As a result, reconfigurability is becoming a key issue in the design of future wireless terminals. In analog front-ends, reconfigurable components are very expensive in terms of design cost and area. Bandpass sampling and digital front-end solutions in general, move the ADC closer to the antenna, avoiding most of the reconfigurable analog hardware. We consider the extreme case of bandpass sampling at RF and analyze the ADC requirements for a multi-standard radio. Two different models, one based on cascade analysis and the other on time-domain simulations, are used with a representative set of emerging wireless standards to derive the ADC requirements: sampling frequency, resolution and clock jitter. This study shows that, with modest RF filtering, RF bandpass sampling will soon become a reality for low power terminals.

Single-carrier code-division multiple access (SC-CDMA), also named cyclic-prefix CDMA in the literature, is a promising air interface for the uplink of the 4G cellular wireless communication systems. It enables the high capacity intrinsically offered by CDMA by making the equalization of the multipath channels and the mitigation of the resulting interference possible at a low complexity. This paper proposes a new air interface that combines SC-CDMA with space-time block coding (STBC) across multiple transmit antennas in order to make the link more robust. Contrary to existing air interfaces that perform the STBC at the chip level, making them only applicable to the downlink, the STBC is performed at the symbol level, making it also applicable to the uplink. In order to optimally detect the different antenna and user signals, a linear joint detector optimized according to the minimum mean square error (MMSE) criterion is designed. By exploiting the cyclic properties of the channel matrices, the complexity of the joint detector is significantly reduced. Furthermore, it is shown analytically that the inter-antenna interference is canceled out at the output of the first stage of the linear MMSE joint detector, consisting of a matched filter. By space-time coding the signal through two antennas at each transmit mobile terminal, a significant gain in signal-to-noise-ratio can be achieved. However, the spatial diversity gain of the proposed system is limited by the multiuser interference (MUI), that is increasing with the user load. Higher complexity non-linear receivers are needed to better compensate the MUI and still benefit from the spatial diversity at high user loads.

In many portable devices, wireless network interfaces consume upwards of 30% of scarce system energy. Reducing the transceiver's power consumption to extend the system lifetime has therefore become a design goal. Our work is targeted at this goal and is based on the following two observations. First, conventional energy management approaches have focused independently on minimizing the fixed energy cost (by shutdown) and on scalable energy costs (by leveraging, for example, the modulation, code-rate and transmission power). These two energy management approaches present a tradeoff. For example, lower modulation rates and transmission power minimize the variable energy component, but this shortens the sleep duration thereby increasing fixed energy consumption. Second, in order to meet the quality of service (QoS) timeliness requirements for multiple users, we need to determine to what extent each system in the network may sleep and scale. Therefore, we propose a two-phase methodology that resolves the sleep-scaling tradeoff across the physical, communications and link layers at design time and schedules nodes at runtime with near optimal energy-efficient configurations in the solution space. As a result, we are able to achieve very low run-time overheads. Our methodology is applied to a case study on delivering a guaranteed QoS for multiple users with MPEG-4 video over a slow-fading channel. By exploiting runtime controllable parameters of actual RF components and a modified 802.11 medium access controller, system lifetime is increased by a factor of 3-to-10 in comparison with conventional techniques

We present a 4-bit power scalable flash analog-to-digital converter in digital 0.18-/spl mu/m CMOS, targeting low power ultra-wide band receivers. To minimize static power consumption, we exploit dynamic comparators with built-in digitally tunable thresholds. The converter has been realized and tested outperforming recent comparable designs even in more advanced technologies. The main performance figures include 5.8GHz effective resolution bandwidth and 0.8pJ/conversion-step at 1-GS/s and Nyquist conditions.

In fast mobile environments, the reception of orthogonal frequency domain modulation (OFDM) signals with tight sub-carrier spacing is challenged by the inter-carrier interference (ICI). This ICI must be compensated for by a suitable equalizer design, which requires the estimation of a larger number of parameters than for static environments. In addition, ICI also degrades the quality of the channel estimation. We propose an analytical approach to estimate the frequency domain channel matrix that relies on its nearly banded structure and a first order Taylor approximation of the channel variation. An additional constraint of this work is to accommodate OFDM systems with large number of sub-carriers and scattered pilots, such as used in DVB-T and DVB-H broadcast. We provide simulation results to demonstrate the performance of the proposed channel estimation method.

Quality-Energy scalability has been proved to be an effective technique toward the cost reduction for signal processing. However, although it has large potentials for reducing signal processing energy in wireless transceivers, it has not yet been applied to them. In this paper, we elaborate an example and present a feedback control scheme to achieve Quality-Energy scalability for the chip level equalization in High Speed Downlink Packet Access (HSDPA) receivers. In conventional equalizers, the coefficients are updated according to the worst-case assumption that the channel is very dynamic. In our proposed approach, we take into account the speed of the channel variation to adapt the updating frequency. Specifically, a low-complexity closed-loop controller is designed to vary the update-interval while limiting the maximum equalization error. The proposed control scheme takes high order channel statistics implicitly into account without the need for an explicit estimator. Simulation results show that the Quality-Energy scalability for the equalizer results in significant energy reduction with minor quality degradation for channels with large coherence times. Specifically, for a pedestrian channel, 60% of the signal processing operations, and hence energy, can be saved with only 0.25 dBBERloss.

The IEEE 802.15.4 standard defines the medium access control (MAC) and physical layer for sensor networks. One of the MAC schemes proposed is slotted carrier sense multiple access with collision avoidance (CSMA/CA), and this paper analyzes whether this scheme meets the design constraints of low-power and low-cost sensor networks. The paper provides a detailed analytical evaluation of its performance in a star topology network for both saturated and unsaturated periodic traffic.The form of the analysis is similar to that of Bianchi for IEEE 802.11 DCF only in the use of a per user Markov model to capture the state of each user at each moment in time. The key assumptions to enable this important simplification and the coupling of the per user Markov models are however different, as a result of the very different designs of the 802.15.4 and 802.11 carrier sensing mechanisms. The performance predicted by the analytical model is very close to that obtained by simulation. Throughput and energy consumption analysis is then performed and design guidelines are derived.

Nowadays OFDM is combined with advanced multiple access and multiple antenna techniques in order to improve the link capacity. In this context, a lot of effort is spent on developing inexpensive wireless OFDM-based receivers. Direct-conversion radio frequency receivers are appealing because they avoid costly IF filters. This kind of receivers implies analog RF I/Q separation introducing an unwanted in-band image interfearence encedue to the mismatch between the in-phase and quadrature branches. Unfortunately, systems combining OFDM with multiple antennas and multiple access techniques are very sensitive to I/Q mismatch, mostly when high order modulation schemes are applied. A digital compensation of this un-wanted effect is required. In this paper, we propose a method for estimating jointly the frequency dependent I/Q imbalance and the propagation channel in the frequency domain. First the channel is estimated based on a pilot optimized to suppress the interference caused by I/Q imbalance. Second I/ C imbalance is estimated and compensated relying on the estimated channel. Both steps are low cost in terms of implementation complexity. Finally, it is shown that the performance of the channel estimate is not degraded by I/Q imbalance. The proposed algorithm enables the system to work at high SNRs.

In the context of 4G wireless mobile systems with direct conversion receivers, an new algorithm for carrier frequency offset (CFO) and IQ-imbalance estimation and compensation at the receiver is proposed. All processing for estimation and compensation of both CFO and IQ-imbalance is done in the time domain. Because the CFO is estimated while taking into account the presence of IQ-imbalance, a very precise estimate of the CFO can be obtained, even in the presence of large IQ-imbalance. The algorithm uses a repetitive low peak-to-average preamble sequence. At the transmitter, in order to improve the estimation result, an artificial CFO is digitally super-imposed on a part of the preamble sequence. The new algorithm yields better results than existing CFO estimation algorithms for SNRs where the IQ imbalance is dominant over the Gaussian noise. The structure of the preamble also allows an effective IQ-imbalance estimation.

New air interfaces are currently being developed to meet the high spectral efficiency requirements of the emerging wireless communication systems. Multicarrier code-division multiple access (MC-CDMA) is seen as a promising candidate for the fourth-generation (4G) cellular communication systems because it can interestingly deal with the multipath propagation at a low processing complexity. Besides spectral efficiency and power consumption, the production cost of the transceiver should also be optimized. Direct conversion radio frequency (RF) receivers are appealing because they avoid costly intermediate frequency (IF) filters. However, they imply RF IQ separation, introducing a phase and amplitude mismatch between the I and Q branches. A communication system based on MC-CDMA is sensitive to synchronization errors and front-end non-idealities because it uses a long symbol duration. The goal of this paper is to evaluate the impact of the carrier frequency offset, the sampling clock offset, and the IQ imbalance on the MC-CDMA downlink system performance, considering a receiver based on channel tracking designed to cope with high mobility conditions. It is demonstrated that part of the effects is compensated by the channel estimation and an expression of the variance of the remaining symbol estimation error is provided. For the cellular system and the target performance considered in this paper, specifications are defined on the non-idealities. The results are validated with bit-error rate simulations

Single-carrier code division multiple access (SC-CDMA), also named cyclic-prefix CDMA in the literature, is a promising air interface for the uplink of the 4G cellular wireless communication systems. It enables the high capacity intrinsically offered by CDMA by making the equalization of the multipath channels and the mitigation of the resulting interference possible at a low complexity. This paper proposes a new air interface that combines SC-CDMA with space time block coding (STBC) across multiple transmit antennas in order to robustify the link. Contrary to existing air interfaces that perform the STBC encoding at the chip level, making them only applicable to the downlink, the STBC encoding is performed at the symbol level, making it also applicable to the uplink. In order to optimally detect the antenna and user signals, a joint detector optimized according to the minimum mean square error (MMSE) criterion is designed. By exploiting the cyclo-stationarity of the channels, the complexity of the joint detector is significantly reduced. It is analytically shown that the inter-antenna interference is canceled out at the output of the first stage of the linear MMSE joint detector, consisting of a matched filter. Assuming typical outdoor channels, a gain of 4 dB signal-to-noise-ratio (SNR) is achieved by the use of two transmit antennas over the single antenna system.

New air interfaces are currently being developed to meet the high requirements of the emerging wireless communication systems. In this context, MC-CDMA is seen as a promising candidate for the 4G cellular communication systems since it can interestingly deal with the multipath propagation. The goal of this paper is to evaluate the impact of the carrier frequency offset, the sampling clock offset and IQ imbalance on the MC-CDMA downlink system performance, considering a receiver based on channel tracking designed to cope with high mobility conditions. It is demonstrated that part of the effects is compensated by the channel estimation and an expression of the variance of the remaining error is provided. For the setup considered in this paper, mostly IQ imbalance degrades the performance. On the other hand, the impact of sample clock offset is negligible with respect to the one of carrier frequency offset.

Single-carrier code division multiple access (SC-CDMA), also named cyclic-prefix CDMA in the literature, is a promising air interface for the up-link of the 4G cellular wireless communication systems. It enables the high capacity intrinsically offered by CDMA by making the equalization of the multi-path channels and the mitigation of the resulting interference possible at a low complexity. This paper studies the impact of multi-user sample clock offset on the performance of up-link SC-CDMA and proposes a compensation strategy at the receiver. It is shown that clock offset leads to an unacceptable degradation of the performance if it is not compensated. In a simultaneous multi-user up-link system, the sample clock offset is usually pre-compensated at the transmitters. This paper demonstrates that the compensation can also be done at the receiver. In a first step the optimal linear multi-user joint detector is designed according to the MMSE criterion, taking the effect of clock offset into account. In a second step the MMSE joint detector is simplified to a low complexity detector incurring a negligible loss of performance

Delay optimization is an important issue for ad hoc wireless networks supporting multimedia applications. Current medium access schemes do not take the application packet size into account for their operation. Long packets win the channel contention equally likely as the smaller packets; however, they occupy the channel for a longer time. This unfairness leads to increased delay and jitter for smaller packets. This paper attempts to resolve the above issue by proposing a fully distributed algorithm that adapts the contention process to the packet size as well. More specifically, we emulate the shortest job first scheduling policy by proposing a new resetting backoff regime. The proposed scheme is then compared to the distributed coordination function of the IEEE 802.11 standard. Analytical and simulation results show that the delay of the small packets is significantly improved.

In many devices, wireless network interfaces consume upwards of 30% of scarce portable system energy. Extending the system lifetime by minimizing communication power consumption has therefore become a priority. Conventional energy management techniques focus independently on minimizing the fixed energy consumption of the transceiver circuit or on scalable transmission control. Fixed energy consumption is reduced by maximizing the transceiver shutdown interval. In contrast, variable transmission rate, coding and power can be leveraged to minimize energy costs. These two energy management approaches present a tradeoff in minimizing the overall system energy. For example, variable energy costs are minimized by transmitting at a lower modulation rate and transmission power, but this also shortens the sleep duration thereby increasing fixed energy consumption. We present a methodology for energy-efficient resource allocation across the physical layer, communications layer and link layer. Our methodology is aimed at providing QoS for multiple users with bursty MPEG-4 video over a time-varying channel. We evaluate our scheme by exploiting control knobs of actual RF components over a modified IEEE 802.11 MAC. Our results indicate that the system lifetime is increased by a factor of 2 to 5 compared to the gains of conventional techniques.

Nowadays, a lot of effort is spent on developing inexpensive orthogonal frequency-division multiplexing (OFDM) receivers. Especially, zero intermediate frequency (zero-IF) receivers are very appealing, because they avoid costly IF filters. However, zero-IF front-ends also introduce significant additional front-end distortion, such as IQ imbalance. Moreover, zero-IF does not solve the phase noise problem. Unfortunately, OFDM is very sensitive to the receiver nonidealities IQ imbalance and phase noise. Therefore, we developed a new estimation/compensation scheme to jointly combat the IQ imbalance and phase noise at baseband. In this letter, we describe the algorithms and present the performance results. Our compensation scheme eliminates the IQ imbalance based on one OFDM symbol and performs well in the presence of phase noise. The compensation scheme has a fast convergence and a small residual degradation: even for large IQ imbalance, the overall system performance for an OFDM-wireless local area network (WLAN) case study is within 0.6 dB of the optimal case. As such, our approach greatly relaxes the mismatch specifications and thus enables low-cost zero-IF receivers.

In this paper, we compare high-performance OFDM and single-carrier with frequency-domain equalization (SC-FD) schemes using multiple-antennas and decision-feedback equalization (DFE), while also accounting for the power amplifier efficiency. To make a realistic comparison, we also consider most important digital imperfections such as channel and noise estimation, transmit and receive filtering, clipping and quantization as well as link layer impact. Our analysis shows that for frequency-selective channels, the relative performance impact of the power amplifier is negligible compared to the frequency diversity impact. The higher frequency diversity exploitation of SC-FD allows it to transmit more efficiently than OFDM in most cases. Therefore, SC-FD is a suitable candidate for broadband wireless communication, especially for battery-powered up-link transmission.

OFDM is a popular modulation scheme for broadband wireless communication. It elegantly handles multipath and has low complexity. Recently, single-carrier with frequency-domain processing (SC-FD) is gaining attention as a possible competitor for OFDM. It is based on the same principles and, therefore, it has similar multipath handling capabilities and low complexity. Moreover, SC-FD promises several other attractive advantages, such as power amplifier efficiency and inherent frequency diversity exploitation. Current performance comparisons do not consider these effects combined. We make the comparison in a realistic scenario considering both the power amplifier efficiency and frequency diversity. Our results show that, in a multipath environment, SC-FD can outperform OFDM by 4 dB, largely due to the better frequency diversity exploitation. Therefore, SC-FD is a good alternative to OFDM for battery-powered terminals, and is therefore especially suited for uplink communication.

Zero-IF transceivers are gaining interest because of their potential to enable low-cost OFDM terminals. However, the zero-IF architecture introduces IQ imbalance which may have a huge impact on the performance. Rather than increasing component cost to decrease the IQ imbalance, an alternative is to tolerate the IQ imbalance and compensate it digitally. Current solutions require extra analog hardware at the transmitter. We analyze transmit IQ imbalance estimation and propose a low-cost, highly effective estimation scheme, which is fully digital and located at the receiver. Performance analysis shows that this scheme can provide up to 4 dB gain while meeting the IEEE 802.11a constellation accuracy specification and more if larger IQ imbalance is present in the transmitter. It therefore enables the design of low-cost, low-complexity OFDM modems.

The goal of this paper is to propose new binary training sequences that allow for optimal joint estimation of multiple channels by relying explicitly on the cyclo-stationary structure of the signals in the OFDM-based communication systems. The new estimator is perfectly suited for multiple-user MIMO types of communication systems where multiple channels have to he estimated simultaneously at each receive antenna. It is shown that the resulting estimator is not only optimal in the sense that it minimizes the channel estimation error variance, but also requires a very low complexity computational effort. Considering two different types of systems, it is shown that the proposed estimator allows for significant SNR gain in comparison to existing methods.

Zero-IF receivers are gaining interest because they enable low-cost WLAN OFDM terminals. However, zero-IF receivers introduce IQ imbalance which may have a huge impact on performance. Rather than increasing component cost to decrease the IQ imbalance, an alternative is to tolerate the IQ imbalance and compensate it digitally. Current solutions converge too slowly for bursty WLAN communication. Moreover, the tremendous impact of a frequency offset on the IQ estimation/compensation problem is not considered. We analyze joint IQ-CFO estimation/compensation and propose a low-cost, highly effective compensation scheme. For large IQ imbalance (/spl epsi/=10%, /spl Delta//spl phi/=10/spl deg/) and large frequency offset, our solution results in an average remaining degradation below 0.5 dB compared to the reference case without IQ imbalance or frequency offset. It therefore enables the design of low-cost, low-complexity WLAN OFDM receivers.

Today a lot of attention is spent on developing inexpensive OFDM receivers. Especially, zero-IF receivers are very appealing, because they avoid costly IF filters. However, this implies IQ demodulation at RF, which therefore cannot be done digitally and thus introduces IQ mismatch. Unfortunately, OFDM is very sensitive to receiver IQ imbalance. Therefore, we developed a new compensation scheme to combat the IQ imbalance at baseband. In this paper, we describe the algorithm and represent the performance results. Our compensation scheme eliminates the IQ imbalance almost perfect. This leads to tremendous improvements, especially in multi-path channels (up to 10 dB performance gain), and enables low-cost zero-IF receivers.

There is an ongoing discussion in the broadband wireless world between OFDM and single-carrier. Single-carrier allows for more relaxed front-end requirements. OFDM, on the other hand, can yield better performance at low complexity. Recently, a new single-carrier scheme with frequency domain equalization and decision-feedback has been proposed for a SISO channel. This single-carrier scheme can reach the OFDM performance. We extend this new scheme for multiple antennas and multiple users. We show that this multi-user scheme with decision-feedback has a 3 dB gain over conventional linear single-carrier multi-user schemes and still maintains a low complexity. We illustrate that our scheme is equivalent with the generalized decision-feedback equalizer, but has a lower complexity.

Orthogonal frequency-division multiplexing with cyclic prefix enables low-cost frequency-domain mitigation of multipath distortion. However, to determine the equalizer coefficients, knowledge of the channel frequency response is required. While a straightforward approach is to measure the response to a known pilot symbol sequence, existing literature reports a significant performance gain when exploiting the frequency correlation properties of the channel. Expressing this correlation by the finite delay spread, we build a deterministic model parametrized by the channel impulse response and, based on this model, derive the maximum-likelihood channel estimator. In addition to being optimal (up to the modeling error), this estimator receives an elegant time-frequency interpretation. As a result, it has a significantly lower complexity than previously published methods.

The two major obstacles toward high-capacity indoor wireless networks are distortion due to the indoor channel and the limited bandwidth which necessitates a high spectral efficiency. A combined orthogonal frequency division multiplexing (OFDM)/spatial division multiple access (SDMA) approach can efficiently tackle both obstacles and paves the way for cheap, high-capacity wireless indoor networks. The channel distortion due to multipath propagation is efficiently mitigated with OFDM while the bandwidth efficiency can be increased with the use of SDMA. However, to keep the cost of an indoor wireless network comparable to its wired counterpart's cost, low-complexity SDMA processors with good performance are of special interest. In this paper, we propose a new multiuser SDMA detector which is designed for constant modulus signals. This constrained least squares (CLS) receiver, which deterministically exploits the constant modulus nature of the subcarrier modulation to achieve better separation, is compared in terms of performance and complexity with the zero forcing (ZF) and the minimum mean square error (MMSE) receiver. Additionally, since the CLS detector relies on reliable channel knowledge at the receiver, we propose a strategy for estimating the multiple input multiple output (MIMO) channels. Simulations for a Hiperlan II-based case-study show that the CLS detector significantly outperforms the ZF detector and comes close to the performance of the MMSE detector for QPSK. For higher order M-PSK, the CLS detector outperforms the MMSF detector. Furthermore, the estimation complexity for the CLS detector is substantially lower than that for the MMSE detector which additionally requires estimation of the noise power.

Turbo codes have become an attractive forward error correction scheme for broadband communications, providing near optimal coding gain. However, the limited throughput, the large latency and the significant power consumption of their current implementations make them hardly suitable for future broadband communication systems (up to 1 Gbit/s). We have developed an innovative turbo-decoding architecture that overcomes these major drawbacks. We increased drastically the throughput and decreased the latency by introducing a high level of parallelism. We reduced significantly the power consumption by optimizing the memory architecture and organization. This paper presents the proposed architecture as a generic, scalable and parametrizable entity. Design trade-offs regarding decoding performance, energy consumption and silicon area are extensively explored and summarized in cost versus throughput curves, enabling an optimal tuning of the proposed architecture to future applications. A net coding gain of 8 dB, a throughput of 500 Mbit/s and a latency of 10 /spl mu/s are achievable with a typical power budget of 1 W and a die size of 20 mm/sup 2/ in 0.18 /spl mu/m CMOS technology. At lower throughput (around 10 Mb/s), the power can be reduced to 10 mW and the area to 5 mm/sup 2/.

The two major obstacles toward high-capacity indoor wireless networks are distortion due to the indoor channel and the limited availability of bandwidth which necessitates a high spectral efficiency. A combined orthogonal-frequency division multiplexing/spatial-diversity multiple access (OFDM/SDMA) approach can effectively tackle both obstacles. The channel distortion due to multipath propagation is easily mitigated with OFDM while the bandwidth efficiency can be increased with the use of SDMA. In order to keep the network's cost acceptable, simplified SDMA processors are preferred over the exponentially complex optimal maximum-likelihood processors. However, these simplified processors perform significantly worse than the optimal ones in terms of average bit error rate (BER). In this paper, we show that by adapting the constellation sizes applied on the individual subcarriers to the channel conditions, the performance of OFDM/SDMA processors can be significantly enhanced. In the uplink, we derive simple closed-form equations for the optimal constellation sizes for both a simple linear minimum mean-square error (MMSE) detector and for a nonlinear MMSE decision feedback equalizer (DFE) detector. Furthermore, for each detector, we introduce a simplified loading algorithm which lowers the computational and signaling complexity substantially at a small performance penalty. In the downlink, we study the dual precoders of the uplink detectors, respectively, the linear MMSE precoder and the nonlinear Tomlinson-Harashima (TH) MMSE-based precoder. For both precoders, we derive expressions for the optimal and the simplified constellation sizes. Additionally, we show that in time-division duplexing systems, the constellation distribution of a set of dual detectors/precoders is identical for up- and downlink, which effectively halves the computational complexity of adaptive loading. In the fully loaded uplink, the proposed adaptive loading algorithm results in a gain of 9 dB for a BER=10/sup -3/ for the linear MMSE detector and a gain of 4.5 dB for the nonlinear MMSE-DFE detector. In the fully loaded downlink, a gain of 6.3 dB is achieved for the MMSE precoder and 5.5 dB for the TH-MMSE precoder.

The two major obstacles towards high-capacity indoor wireless networks are distortion due to the indoor channel and the limited bandwidth. A combined OFDM/SDMA approach efficiently tackles both obstacles and paves the way for low cost, high-capacity wireless indoor networks (see Vandenameele, P. et al., VTC Spring, p.1712-16, 1999; IEEE J. Selected Areas in Commun., vol.18, no.11, p.2312-21, 2000). Channel distortion due to multipath propagation is efficiently mitigated by orthogonal frequency division multiplexing (OFDM) while the bandwidth efficiency is increased by the use of spatial diversity multiple access (SDMA). To keep the WLAN cost low, simple SDMA processors with good performance are necessary. Hence, we propose a new, low-complexity multiuser SDMA detector, which is designed for constant modulus signals. This linear constrained least squares (CLS) receiver, which explicitly exploits the constant modulus nature of subcarrier modulation to achieve better separation, is compared in terms of performance and complexity with the zero forcing (ZF) and the minimum mean square error (MMSE) receivers. Simulations show that the CLS detector significantly outperforms the ZF detector and comes close to the performance of the MMSE detector for QPSK. For higher order MPSK, the CLS detector outperforms the MMSE detector substantially.

Orthogonal frequency-division multiplexing (OFDM) with cyclic prefix enables low cost frequency-domain mitigation of multipath distortion. However, to determine the equalizer coefficients, knowledge of the channel frequency response is required. While a straightforward approach is to measure the response to a known pilot symbol sequence, existing literature reports a significant performance gain when exploiting the frequency correlation properties of the channel. Expressing this correlation by the finite delay spread, we build a deterministic model parametrized by the channel impulse response and, based on this model, derive the maximum likelihood (ML) channel estimator. In addition to being optimal, this estimator receives an elegant time-frequency interpretation. As a result, it has a significantly lower complexity than previously published methods.

The two major obstacles towards high-capacity indoor wireless networks are distortion due to the indoor channel and the limited bandwidth which necessitates a high spectral efficiency. The combination of single carrier with cyclic prefix (SC-CP) modulation and spatial division multiple access (SDMA) tackles both obstacles and paves the way for low cost, high-capacity wireless indoor networks (see Vandenameele, P. et al., ICASSP, p.3714-17, 2000). The channel distortion due to multipath propagation is elegantly mitigated with SC-CP while the bandwidth efficiency is increased with the use of SDMA. However, to keep the WLAN cost low, simple SDMA processors with good performance are necessary. Hence, we propose a new low-complexity multiuser SDMA detector, which is designed for constant modulus signals. This linear constrained least squares (CLS) receiver, which explicitly exploits the constant modulus nature of the modulation, is compared in terms of performance and complexity with the zero forcing (ZF) and the minimum mean square error (MMSE) receiver. Simulations show that the CLS detector significantly outperforms the ZF detector and comes very close to the performance of the MMSE detector. Furthermore, the estimation complexity for the CLS detector is substantially lower than for the MMSE detector, which additionally requires estimation of the noise power.

In recent years, wireless indoor networks have received a lot of scientific and industrial attention. Most systems rely on the use of orthogonal frequency division multiplexing (OFDM) because of its capability to elegantly cope with multipath interference. However, while OFDM provides a nice solution for the digital modem, its front-end requirements should be investigated as well. To that goal, we have set up a simulation environment which comprises both the digital modem and the most important front-end nonidealities. We show that for the same data rate, bandwidth and transmit power constraints, Single-Carrier with Cyclic Prefix (SC-CP) allows the design of a more power-efficient modem than OFDM and is therefore a better candidate for portable wireless terminals.

The average bit-error rate of transmit antenna selection combined with receive maximum-ratio combining is computed as a function of the transmit antenna update rate when using binary phase-shift keying in flat Rayleigh fading channels. This scheme achieves an order of diversity equal to the product of the number of transmit and receive antennas. Therefore, it can gain significant diversity benefits over traditional receive diversity schemes by distributing the antennas over the transmit and receive side.

The combination of orthogonal frequency division multiplexing (OFDM) with linear processing-based spatial diversity multiple access (SDMA) enables high-capacity wireless local networks at reasonable implementation complexity. We investigate adaptive loading of the carriers as a means for lowering the relatively high symbol error rate (SER) of such linear OFDM/SDMA networks and propose efficient closed-form expressions for the optimal bit distributions. We analyze the performance and complexity of the proposed algorithms and show that substantial gains in SER can be achieved. Furthermore, simplified algorithms are proposed which have a small performance penalty but which possess a lower computational and signaling cost.

Two major technical challenges in the design of future broadband wireless networks are the impairments of the propagation channel and the need for spectral efficiency. We previously proposed a combined OFDM/SDMA approach that mitigates the channel impairments by orthogonal frequency division multiplexing (OFDM) with cyclic prefix insertion and that achieves a high spectral efficiency by space division multiple access (SDMA). However, because of the multicarrier modulation, this approach requires high-backoff power amplifiers in the analog frontend. We present a SC-FD-SDMA basestation, which avoids these expensive amplifiers by using constant-envelope single-carrier (SC) modulation and still features the advantages of frequency-domain (FD) multipath mitigation and SDMA. We pay special attention to the initialization of such basestation and its fixed point requirements, since they are critical aspects of any realistic implementation. A case-study shows how SC-FD-SDMA enables a 100 Mbps wireless LAN with a bandwidth efficiency of 8 bps/Hz and an uncoded BER of 10/sup -3/ at 13.5 dB.

Two major technical challenges in the design of future broadband wireless networks are the impairments of the propagation channel and the need for spectral efficiency. To mitigate the channel impairments, orthogonal frequency division multiplexing (OFDM) can be used, which transforms a frequency-selective channel in a set of frequency-flat channels. On the other hand, to achieve higher spectral efficiency, space division multiple access (SDMA) can be used, which reuses bandwidth by multiplexing signals based on their spatial signature. In this paper, we present a combined OFDM/SDMA approach that couples the capabilities of the two techniques to tackle both challenges at once. We propose four algorithms, ranging from a low-complexity linear minimum mean squared error (MMSE) solution to the optimal maximum likelihood (ML) detector. By applying per-carrier successive interference cancellation (pcSIC), initially proposed for DS-CDMA, and introducing selective state insertion (SI), we achieve a good tradeoff between performance and complexity. A case study demonstrates that, compared to the MMSE approach, our pcSIC-SI-OFDM/SDMA algorithm obtains a performance gain of 10 dB for a BER of 10/sup -3/, while it is only three times more complex. On the other hand, it is two orders of magnitude less complex than the ML approach, for a performance penalty of only 2 dB.